Intel 8259A Programmable Interrupt Controller

8085 microprocessor, consists of five interrupt input pins named as RST 5.5, RST 6.5, RST7.5, INTR, and TRAP respectively. When there are a maximum of five I/O devices they want to perform driven interrupt data transfer, which is connected to the five interrupt input pins. Now considering the case where there are more than five I/O devices which would like to perform an interrupt driven data transfer scheme. Here for some pins termed as an interrupt, we use more than one I/O device to the process. Most of the microprocessors nowadays have the configuration of these interrupt input pins. There are few microprocessors that have two interrupt input pins, they are Intel 8086 and Motorola 6800. For receiving interrupt requests from devices interrupt pins are used.

Fig: Devices interrupting 8085 microprocessor through OR gate

In the above figure, the inputs are given to the OR gate from Port B of 8255 PPI chips. For operation in mode 1, these 8255 chips are configured. When any one or more than the three inputs applied to the OR gate is active8085 is interrupted. We branch the processor in reality to different subroutines based on the interrupt source. So the ISS for RST 6.5 the processor has to identify among the I/O ports connected to the RST6.5 pin where the I/O port needs service at an instant. This process is termed as “polling”. The subroutine which starts at 0034H is now termed as the interrupt level subroutine (ILS) for RST 6.5 in place of ISS RST 6.5. In the ILS once the port that needs to get service is identified, the processor branches the appropriate ISS.

The disadvantages of the polling method are stated below −

  • Since the polling process takes a lot of time which results in slow interrupt response.

  • When all the three inputs of the OR gate are active, then in the ILS shown in the first device termed as device_1 is serviced first and is polled. The various devices priority connected on a single interrupt input pin is decided in order in which the polling process is done for them.

  • Similarly, when device_3 is needed to be serviced, the ILS first checks the two devices and finds if they need service or not, and then only it checks the third device termed as device_3 and starts servicing it. Hence the priority gets fixed and cannot be altered further.

The above-mentioned disadvantages are henceforth eliminated if a programmable interrupt controller (PIC) is used in the microcomputer system. In the Intel family PIC 8259, A is a remarkable PIC which is to be noted.