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# Digital Circuits - De-Multiplexers

**De-Multiplexer** is a combinational circuit that performs the reverse operation of Multiplexer. It has single input, ‘n’ selection lines and maximum of 2^{n} outputs. The input will be connected to one of these outputs based on the values of selection lines.

Since there are ‘n’ selection lines, there will be 2^{n} possible combinations of zeros and ones. So, each combination can select only one output. De-Multiplexer is also called as **De-Mux**.

## 1x4 De-Multiplexer

1x4 De-Multiplexer has one input I, two selection lines, s_{1} & s_{0} and four outputs Y_{3}, Y_{2}, Y_{1} &Y_{0}. The **block diagram** of 1x4 De-Multiplexer is shown in the following figure.

The single input ‘I’ will be connected to one of the four outputs, Y_{3} to Y_{0} based on the values of selection lines s_{1} & s0. The **Truth table** of 1x4 De-Multiplexer is shown below.

Selection Inputs | Outputs | ||||
---|---|---|---|---|---|

S_{1} |
S_{0} |
Y_{3} |
Y_{2} |
Y_{1} |
Y_{0} |

0 | 0 | 0 | 0 | 0 | I |

0 | 1 | 0 | 0 | I |
0 |

1 | 0 | 0 | I |
0 | 0 |

1 | 1 | I |
0 | 0 | 0 |

From the above Truth table, we can directly write the **Boolean functions** for each output as

$$Y_{3}=s_{1}s_{0}I$$

$$Y_{2}=s_{1}{s_{0}}'I$$

$$Y_{1}={s_{1}}'s_{0}I$$

$$Y_{0}={s_1}'{s_{0}}'I$$

We can implement these Boolean functions using Inverters & 3-input AND gates. The **circuit diagram** of 1x4 De-Multiplexer is shown in the following figure.

We can easily understand the operation of the above circuit. Similarly, you can implement 1x8 De-Multiplexer and 1x16 De-Multiplexer by following the same procedure.

## Implementation of Higher-order De-Multiplexers

Now, let us implement the following two higher-order De-Multiplexers using lower-order De-Multiplexers.

- 1x8 De-Multiplexer
- 1x16 De-Multiplexer

### 1x8 De-Multiplexer

In this section, let us implement 1x8 De-Multiplexer using 1x4 De-Multiplexers and 1x2 De-Multiplexer. We know that 1x4 De-Multiplexer has single input, two selection lines and four outputs. Whereas, 1x8 De-Multiplexer has single input, three selection lines and eight outputs.

So, we require two **1x4 De-Multiplexers** in second stage in order to get the final eight outputs. Since, the number of inputs in second stage is two, we require **1x2 DeMultiplexer** in first stage so that the outputs of first stage will be the inputs of second stage. Input of this 1x2 De-Multiplexer will be the overall input of 1x8 De-Multiplexer.

Let the 1x8 De-Multiplexer has one input I, three selection lines s_{2}, s_{1} & s_{0} and outputs Y_{7} to Y_{0}. The **Truth table** of 1x8 De-Multiplexer is shown below.

Selection Inputs | Outputs | |||||||||
---|---|---|---|---|---|---|---|---|---|---|

s_{2} |
s_{1} |
s_{0} |
Y_{7} |
Y_{6} |
Y_{5} |
Y_{4} |
Y_{3} |
Y_{2} |
Y_{1} |
Y_{0} |

0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | I |

0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | I |
0 |

0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | I |
0 | 0 |

0 | 1 | 1 | 0 | 0 | 0 | 0 | I |
0 | 0 | 0 |

1 | 0 | 0 | 0 | 0 | 0 | I |
0 | 0 | 0 | 0 |

1 | 0 | 1 | 0 | 0 | I |
0 | 0 | 0 | 0 | 0 |

1 | 1 | 0 | 0 | I |
0 | 0 | 0 | 0 | 0 | 0 |

1 | 1 | 1 | I |
0 | 0 | 0 | 0 | 0 | 0 | 0 |

We can implement 1x8 De-Multiplexer using lower order Multiplexers easily by considering the above Truth table. The **block diagram** of 1x8 De-Multiplexer is shown in the following figure.

The common **selection lines, s _{1} & s_{0}** are applied to both 1x4 De-Multiplexers. The outputs of upper 1x4 De-Multiplexer are Y

_{7}to Y

_{4}and the outputs of lower 1x4 De-Multiplexer are Y

_{3}to Y

_{0}.

The other **selection line, s _{2}** is applied to 1x2 De-Multiplexer. If s

_{2}is zero, then one of the four outputs of lower 1x4 De-Multiplexer will be equal to input, I based on the values of selection lines s

_{1}& s

_{0}. Similarly, if s

_{2}is one, then one of the four outputs of upper 1x4 DeMultiplexer will be equal to input, I based on the values of selection lines s

_{1}& s

_{0}.

### 1x16 De-Multiplexer

In this section, let us implement 1x16 De-Multiplexer using 1x8 De-Multiplexers and 1x2 De-Multiplexer. We know that 1x8 De-Multiplexer has single input, three selection lines and eight outputs. Whereas, 1x16 De-Multiplexer has single input, four selection lines and sixteen outputs.

So, we require two **1x8 De-Multiplexers** in second stage in order to get the final sixteen outputs. Since, the number of inputs in second stage is two, we require **1x2 DeMultiplexer** in first stage so that the outputs of first stage will be the inputs of second stage. Input of this 1x2 De-Multiplexer will be the overall input of 1x16 De-Multiplexer.

Let the 1x16 De-Multiplexer has one input I, four selection lines s_{3}, s_{2}, s_{1} & s_{0} and outputs Y_{15} to Y_{0}. The **block diagram** of 1x16 De-Multiplexer using lower order Multiplexers is shown in the following figure.

The common **selection lines s _{2}, s_{1} & s_{0}** are applied to both 1x8 De-Multiplexers. The outputs of upper 1x8 De-Multiplexer are Y

_{15}to Y

_{8}and the outputs of lower 1x8 DeMultiplexer are Y

_{7}to Y

_{0}.

The other **selection line, s _{3}** is applied to 1x2 De-Multiplexer. If s

_{3}is zero, then one of the eight outputs of lower 1x8 De-Multiplexer will be equal to input, I based on the values of selection lines s

_{2}, s

_{1}& s

_{0}. Similarly, if s3 is one, then one of the 8 outputs of upper 1x8 De-Multiplexer will be equal to input, I based on the values of selection lines s

_{2}, s

_{1}& s

_{0}.