Pipelining is a very effective method for speeding up instruction execution along a sequential path. But if a branch introduces the pipeline and disorganizes the sequential processing, the implementation of the pipeline will be seriously disrupted unless appropriate methods are used.
It can indicate the problems that generate branches in pipelines. Let us suppose the implementation of an unconditional branch in a pipeline. An unconditional branch is implemented on a traditional RISC pipeline when no specific care is taken to boost adaptability.
The pipeline is considered to process instructions in four subsequent cycles, such as, in the consecutive fetch (F), decode (D), execute (E) and writeback (WB) cycles. Thus the target address (TA) of the branch will be evaluated during the E cycle.
Let us examine the implementation of a simple instruction sequence including an unconditional branch. Therefore, for simplicity, let us consider that each of the designated instructions can be treated in four consecutive cycles.
When the given instruction sequence has been performed the usage of easy pipelining the following appears. The pipeline, as an assembly line, maintaining processing subsequent instructions until a branch (B) is encountered during its decoding in ti+2.
In the next cycle (ti+3) the target address will be computed and the sequential processing stopped. Because the target address becomes familiar at the end of the E cycle, the pipeline can begin fetching the first target instruction (it1) only in cycle it+4.
Processing a conditional branch in a simple pipeline can generate an even higher penalty. This would result from the additional function of calculating the determined condition, which requires a more cycle. Therefore, the next address, whether the incremented sequential one or the branch target address, can only be specified afterward. The scenario is even poor for unresolved conditional branches.
The term a conditional branch unresolved, if the determined condition cannot be computed in due time because the result indicated to has not yet been made. For instance, a conditional branch is predetermined to check the result of a previous floating-point division. In this method, a large number of cycles is needed, generally 10- 50, to obtain the result. Therefore, a subsequent conditional branch remains uncertain for various cycles.
This represents that in a pipeline each branch instruction gives improvement to several wasted cycles (known as bubbles) unless suitable branching approaches are introduced. Branches are very frequent in general-purpose code, on average, it can expect about each fourth to sixth instruction to be a branch. Thus, ineffective branch processing can seriously impede performance.