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Instruction type ADD R in 8085 Microprocessor
In 8085 Instruction set, ADD R is a mnemonic that stands for “Add contents of R to Accumulator”. As addition is a binary operation, so it requires two operands to be operated on. So input operands will reside on Accumulator and R registers and after addition the result will be stored back on to Accumulator. In this case, “R” stands for any of the following registers or memory location M pointed by HL pair.
R = A, B, C, D, E, H, L, or M
It is 1-Byte instruction so occupies only 1-Byte in memory. As R can have any of the eight values, there are eight opcodes for this type of instruction.
| Mnemonics, Operand | Opcode(in HEX) | Bytes |
|---|---|---|
| ADD A | 87 | 1 |
| ADD B | 80 | 1 |
| ADD C | 81 | 1 |
| ADD D | 82 | 1 |
| ADD E | 83 | 1 |
| ADD H | 84 | 1 |
| ADD L | 85 | 1 |
| ADD M | 86 | 1 |
As example of this category, let us consider the instruction ADD E. It is a 1-Byte instruction. Let us consider that Accumulator is having initial content 02H and E register is having initial content 03H. so after summation 05H will remain on the Accumulator updating its previous content. Here is the tracing table for us to have better understanding.
| Before | After | |
|---|---|---|
| (E) | 03H | 03H |
| (A) | 02H | 05H |
| Address | Hex Codes | Mnemonic | Comment |
|---|---|---|---|
| 2004 | 83 | ADD E | Accumulator = Accumulator + Register E |
Here is the timing diagram of the instruction ADD E execution.
Summary − So this instruction ADD E requires 1-Byte, 1 Machine Cycles (Opcode Fetch) and 4 T-States for execution as shown in the timing diagram.
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