- Trending Categories
Data Structure
Networking
RDBMS
Operating System
Java
MS Excel
iOS
HTML
CSS
Android
Python
C Programming
C++
C#
MongoDB
MySQL
Javascript
PHP
Physics
Chemistry
Biology
Mathematics
English
Economics
Psychology
Social Studies
Fashion Studies
Legal Studies
- Selected Reading
- UPSC IAS Exams Notes
- Developer's Best Practices
- Questions and Answers
- Effective Resume Writing
- HR Interview Questions
- Computer Glossary
- Who is Who
Instruction type XRA R in 8085 Microprocessor
In 8085 Instruction, XRA is a mnemonic that stands for “eXclusive OR Accumulator” and “R” stands for any of the following registers, or memory location M pointed by HL pair.
R = A, B, C, D, E, H, L, or M
This instruction is used to Ex-OR contents of R with the Accumulator. The result of Ex-OR operation will be stored in the Accumulator. As R can have any of the eight values, there are eight opcodes for this type of instruction. It occupies only 1-Byte in memory.
Mnemonics, Operand | Opcode(in HEX) | Bytes |
---|---|---|
XRA A | AF | 1 |
XRA B | A8 | 1 |
XRA C | A9 | 1 |
XRA D | AA | 1 |
XRA E | AB | 1 |
XRA H | AC | 1 |
XRA L | AD | 1 |
XRA M | AE | 1 |
Let us consider XRA E as a sample instruction of this category. It is a 1-Byte instruction so during execution it will occupy only a single Byte in the memory. Let us consider that Accumulator and E registers are having initial contents as ABH and CDH respectively. The result of execution of this instruction has been shown in the following tracing table.
Before | After | |
---|---|---|
(E) |
CDH | CDH |
(A) |
ABH | 66H |
(F) |
Any values | Cy=0,AC=0,S=0,P=1,Z=0 |
The internal calculation has been done as shown below −
(A) ABH ---> 1010 1011 (E) CDH ---> 1100 1101 --------- XRAE --->0110 0110 (66H)
Address | Hex Codes | Mnemonic | Comment |
---|---|---|---|
2004 | AB | XRA E | A = A XOR E |
The timing diagram against this instruction XRA E execution is as follows −

Summary − So this instruction XRA E requires 1-Byte, 1-Machine Cycle (Opcode Fetch) and 4 T-States for execution as shown in the timing diagram.
- Related Articles
- Instruction type INR R in 8085 Microprocessor
- Instruction type ADC R in 8085 Microprocessor
- Instruction type SUB R in 8085 Microprocessor
- Instruction type DCR R in 8085 Microprocessor
- Instruction type SBB R in 8085 Microprocessor
- Instruction type ANA R in 8085 Microprocessor
- Instruction type ORA R in 8085 Microprocessor
- Instruction type CMP R in 8085 Microprocessor
- Instruction type ADD R in 8085 Microprocessor
- Instruction type MVI r, d8 in 8085 Microprocessor
- Instruction type MOV r, M in 8085 Microprocessor
- Instruction type MOV M, r in 8085 Microprocessor
- Instruction type CMC in 8085 Microprocessor
- Instruction type STC in 8085 Microprocessor
- Instruction type RLC in 8085 Microprocessor
