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Instruction type MOV r, M in 8085 Microprocessor
In 8085 Instruction set, MOV r, M is an instruction where the 8-bit data content of the memory location as pointed by HL register pair will be moved to the register r. Thus this is an instruction to load register r with the 8-bit value from a specified memory location whose 16-bit address is in HL register pair.
As r can have any of the seven values, there are seven opcodes for this type of instruction.
r = A, B, C, D, E, H, or L
| Mnemonics, Operand | Opcode | Bytes |
|---|---|---|
| MOV A, M | 7E | 1 |
| MOV B, M | 46 | 1 |
| MOV C, M | 4E | 1 |
| MOV D, M | 56 | 1 |
| MOV E, M | 5E | 1 |
| MOV H, M | 66 | 1 |
| MOV L, M | 6E | 1 |
It occupies only 1-Byte in memory. MOV E, M is an example instruction of this type. It is a 1-Byte instruction. Suppose E register content is DBH, H register content is 40H, and L register content is 50H. Let us say location 4050H has the data value AAH. When the 8085 executes this instruction, the contents of E register will change to AAH, as shown below.
| Before | After | |
|---|---|---|
(E) |
DBH | AAH |
(HL) |
4050H | 4050H | (4050H) |
AAH | AAH |
| Address | Hex Codes | Mnemonic | Comment |
|---|---|---|---|
| 2008 | 2A | MOV E, M | Comment E <- Content of the memory location pointed by HL register pair |
The timing diagram for this MOV E, M instruction is as follows −
Summary − So this instruction MOV E, M requires 1-Byte, 2-Machine Cycles (Opcode Fetch, Memory Read) and 7 T-States for execution as shown in the timing diagram.
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