What is General Register Organization?

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A set of flip-flops forms a register. A register is a unique high-speed storage area in the CPU. They include combinational circuits that implement data processing. The information is always defined in a register before processing. The registers speed up the implementation of programs.

Registers implement two important functions in the CPU operation are as follows −

  • It can support a temporary storage location for data. This supports the directly implementing programs to have fast access to the data if required.
  • It can save the status of the CPU and data about the directly implementing program.

Example − Address of the next program instruction, signals get from the external devices and error messages, and including different data is saved in the registers.

If a CPU includes some registers, therefore a common bus can link these registers. A general organization of seven CPU registers is displayed in the figure.

The CPU bus system is managed by the control unit. The control unit explicit the data flow through the ALU by choosing the function of the ALU and components of the system.

Consider R1 ← R2 + R3, the following are the functions implemented within the CPU −

MUX A Selector (SELA) − It can place R2 into bus A.

MUX B Selector (SELB) − It can place R3 into bus B.

ALU Operation Selector (OPR) − It can select the arithmetic addition (ADD).

Decoder Destination Selector (SELD) − It can transfers the result into R1.

The multiplexers of 3-state gates are performed with the buses. The state of 14 binary selection inputs determines the control word. The 14-bit control word defines a micro-operation.

The encoding of register selection fields is specified in the table.

Encoding of Register Selection Field

Binary CodeSELASELBSELD
000InputInputNone
001R1R1R1
010R2R2R2
011R3R3R3
100R4R4R4
101R5R5R5
110R6R6R6
111R7R7R7

There are several micro-operations are implemented by the ALU. Few of the operations implemented by the ALU are displayed in the table.

Encoding of ALU Operations

OPR SelectOperationSymbol
00000Transfer ATSFA
00001Increment AINCA
00010Add A + BADD
00101Subtract A - BSUB
00110Decrement ADECA
01000ADD A and BAND
01010OR A and BOR
01100XOR A and BXOR
01110Complement ACOMA
10000Shift right ASHRA
11000Shift left ASHLA

There are some ALU micro-operations are shown in the table.

ALU Micro-Operations

Micro-operationSELASELBSELDOPRControl Word
R1 ← R2 – R3R2R3R1SUB01001100100101
R4 ← R4 ∨ R5R4R5R4OR10010110001010
R6 ← R6 + R1-R6R1INCA11000011000001
R7 ← R1R1-R7TSFA00100011100000
Output ← R2R2NoneTSFA01000000000000
Output ← InputInput-NoneTSFA00000000000000
R4 ← shl R4R4-R4SHLA10000010011000
R5 ← 0R5R5R5XOR10110110101100
raja
Published on 24-Jul-2021 13:58:41
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