- Trending Categories
- Data Structure
- Operating System
- C Programming
- Social Studies
- Fashion Studies
- Legal Studies
- Selected Reading
- UPSC IAS Exams Notes
- Developer's Best Practices
- Questions and Answers
- Effective Resume Writing
- HR Interview Questions
- Computer Glossary
- Who is Who
Multiple memory address range in 8085 Microprocessor
Suppose we have the chip select circuit as shown in the below figure, then what is the address range for the RAM?
Fig. Chip selection that results in multiple address range.
A15 and A14 pins are used for the selection of Random Access Memory, and pins ranging from A10 to A0 are used for the selection of location in RAM. But the value of the pins A13, A12 and A11 have non-dependent value. They play no role for selection of chip or location on RANDOM ACCESS MEMORY. Hence they are termed as don't cares and called x for more signification.
We have eight values for the pins of address ranging from A13 to A11, and there are eight different ranges of address made for the Random Access Memory. The range of address for the RANDOM ACCESSS MEMORY for the different values of the pins ranging from A13 to A11 are shown in the table below, which helps us to understand the range.
A13-11 Range for RAM 0 0 0 C000H-C7FFH 0 0 1 C800H-CFFFH 0 1 0 D000H-D7FFH 0 1 1 D800H-DFFFH 1 0 0 E000H-E7FFH 1 0 1 E800H-EFFFH 1 1 0 F000H-F7FFH 1 1 1 F800H-FFFFH
Hence 0 location in 2K × 8 RAM are addressed by 8085 microprocessor to the memory locations C000H, C800H, D000H, D800H, E000H, E800H, F000H, F800H. We can say in other way that there are multiple addresses, for each and every location. The process of selection of chip where there is some don't care values specified for the lines of address is termed as partially decoded addressing.
The disadvantage here lies that only locations of 2K of the physical memory occupied locations 16K of the space of address. Here the advantage of partially decoded addressing process lies in the fact that the circuit meant for selecting the chip is quite simple and easy to understand. If all the lines of address are used memory chip, in the selection of memory chip, it is termed as ‘fully decoded addressing’. The advantage here lies in the fact that 2K locations of physical memory occupies only 2K locations of space of address. The circuit is very complex which is a great disadvantage here. Ranging from A13 to A11 we have eight different values for the RAM. If we use all the lines of address which are used for the selection of chip of memory, and are used for memory allocation in the device the addressing is completely decoded.
- Pin details and its address range in 8085 Microprocessor
- Address/data buffers in 8085 Microprocessor
- Internal address latch in 8085 Microprocessor
- Memory speed requirement in 8085 Microprocessor
- Memory-mapped I/O in 8085 Microprocessor
- Memory Read (MR) machine cycle in 8085 Microprocessor
- Memory Write (MW) machine cycle in 8085 Microprocessor
- In 8085 Microprocessor, compare I/O port chips and memory chips
- I/O-mapped I/O or memory-mapped I/O in 8085 Microprocessor
- Addressing modes of 8085 in 8085 Microprocessor
- Difference between Memory Address Mode and Register Address Mode.
- Microprocessor 8085 Architecture
- DAA instruction in 8085 Microprocessor
- ALE pin in 8085 Microprocessor
- Flags register in 8085 Microprocessor