Memory-mapped I/O in 8085 Microprocessor

It is possible to address an I/O port as if it were a memory location. For example, let us say, the chip select pin of an I/O port chip is activated when address = FFF0H, IO/M* = 0, and RD* = 0. This is shown in the following fig.

In this case, the I/O port chip is selected when the 8085 is thinking that it is addressing memory location FFF0H for a read operation. Note that 8085 thinks that it is addressing a memory location because it has sent out IO/M* as a logic 0. But in reality, an input port has been selected, and the input port supplies information to the 8085. Such I/O ports that are addressed by the processor as if they were memory locations are called memory-mapped I/O ports.

In the memory location we address an Input Output port. An example to be cited as when address = FFF0H, IO/M* = 0, and RD* = 0. Here we select the Input Output port chip when 8085 microprocessor finds that it is memory allocated location as it is sent out like IO/M* as a logic 0.

But in real world we select an Input Port which supplies information to 8085 Microprocessor. Like the memory locations 8085 microprocessor gets addressed by the processor which are called memory-mapped Input Output ports.

There is a set of instructions for this memory-mapped I/O operations. E.g. STA, LDA etc. Let us discuss STA instruction in detail for better understanding.

Register A is an 8-bit register used in 8085 to perform arithmetic, logical, I/O & LOAD/STORE operations. Register A is quite often called as an Accumulator. An accumulator is a register for short-term, intermediate storage of arithmetic and logic data in a computer's CPU (Central Processing Unit). In an arithmetic operation involving two operands, one operand has to be in this register. And the result of the arithmetic operation will be stored or accumulated in this register. Similarly, in a logical operation involving two operands, one operand has to be in the accumulator. Also, some other operations, like complementing and decimal adjustment, can be performed only on the accumulator.

Let us now consider a program segment which involves content of Accumulator only. In 8085 Instruction set, STA is a mnemonic that stands for STore Accumulator contents in memory. In this instruction, Accumulator 8-bit content will be stored to a memory location whose 16-bit address is indicated in the instruction as a16. This instruction uses absolute addressing for specifying the destination. This instruction occupies 3-Bytes of memory. First Byte is required for the opcode, and next successive 2-Bytes provide the 16-bit address divided into 8-bits each consecutively.

Mnemonics, OperandOpcode (in HEX)Bytes
STA Address323

Let us consider STA 4050H as an example instruction of this type. It is a 3-Byte instruction. The first Byte will contain the opcode hex value 32H. As in 8085 assembly language coding supports low order Byte of the address should be mentioned at first then the high order Byte of the address should be mentioned next. So next Byte in memory will hold 50H and after that 40H will be kept in the last third Byte. Let us suppose the initial content of Accumulator is ABH and initial content of memory location 4050H is CDH. So after execution, Accumulator content will remain as ABH and 4050H location’s content will become ABH replacing its previous content CDH. The content tracing of this instruction has been shown below −


The content tracing of this instruction has been shown below

AddressHex CodesMnemonicComment
20082ASTA 4050HContent of the memory location 4050H A
Low order Byte of the address
High order Byte of the address

The timing diagram of this instruction STA 4050H is as follows −

Summary − So this instruction STA 4050H requires 3-Bytes, 4-Machine Cycles (Opcode Fetch, Memory Read, Memory Read, Memory Write) and 13 T-States for execution as shown in the timing diagram.