Found 558 Articles for Microprocessor

Instruction type ACI d8 in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, ACI is a mnemonic which stands for 'Add with Carry Immediate to Accumulator' and here “d8” stands for any 8-bit or 1-Bytedata. This instruction is actually meant for adding one 8-bit immediate data or operand to the Accumulator along with the carry value. The result of the addition will be stored in the Accumulator itself and replacing initial value of the Accumulator. As it is an arithmetic instruction, so the flags are affected based on the result. It holds 2-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes ACI Data CE 2 ... Read More

Instruction type ADC R in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

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In 8085 assembly language coding, sometimes there is a requirement to add two numbers and where each of these numbers are having several Bytes in size. As example, let us add the following two 16-bit numbers. 1 10 50H A0 F1H ------ B1 01H In this example, the addition of 50H and F1H results in a sum of 01H with a carry of 1. Now, we are supposed to add 10H and A0H along with this carry of 1. To carry out ... Read More

Instruction type INR R in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, INR is a mnemonic that stands for ‘INcRement’ and ‘R’ stands for any of the following registers or memory location M pointed by HL pair. R = A, B, C, D, E, H, L, or M This instruction is used to add 1 with the contents of R. So the previous value in R will get increased by amount 1 only. The result of increment will be stored in R updating its previous content. All flags, except Cy flag, are affected depending on the result thus produced. In different assembly language core, this instruction ... Read More

Instruction type ADI d8 in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

5K+ Views

In 8085 Instruction set, ADI is a mnemonic, which stands for “ADd Immediate to Accumulator” and here “d8” stands for any 8-bit or 1-Byte of data. This instruction is used to add 8-bit immediate data to the Accumulator. The result of addition will be stored in the Accumulator. So the previous content of the Accumulator will be over written. It occupies 2-Bytes in memory. The flags are affected based on the result. Mnemonics, Operand Opcode(in HEX) Bytes ADI Data C6 2 Let us consider as example instruction ADI 03H of this type. As it ... Read More

Instruction type ADD R in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

7K+ Views

In 8085 Instruction set, ADD R is a mnemonic that stands for “Add contents of R to Accumulator”. As addition is a binary operation, so it requires two operands to be operated on. So input operands will reside on Accumulator and R registers and after addition the result will be stored back on to Accumulator. In this case, “R” stands for any of the following registers or memory location M pointed by HL pair. R = A, B, C, D, E, H, L, or M It is 1-Byte instruction so occupies only 1-Byte in memory. As R can ... Read More

Instruction type SHLD a16 in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

7K+ Views

In 8085 Instruction set, SHLD is a mnemonic, which stands for Store HLpair using Direct addressing in memory location whose 16-bit address is denoted as a16. As HL pair has to be stored, so it has to be stored in two consecutive locations starting at the address a16. We know that H and L are 8-bit registers. So their contents will be stored in two consecutive memory locations as each memory location can hold 8-bits of data. This instruction uses absolute addressing mode for specifying the destination. It occupies 3-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes ... Read More

Instruction type LHLD a16 in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set LHLD is a mnemonic that stands for Load HL pair using Direct addressing from memory location whose 16-bit address is denoted as a16. So the previous content of HL register pair will get updated with the new 16-bits value. As HL pair has to be updated, so data comes from two consecutive memory locations starting at the address a16 and also from next address location. This instruction uses absolute addressing mode for specifying the data in the instruction. It occupies 3-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes LHLD Address 2A ... Read More

Instruction type STAX rp in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, STAX is a mnemonic that stands for SToreAccumulator contents in memory pointed by eXtended register denoted as “rp”.Hererp stands for register pair. This instruction uses register indirect addressing for specifying the destination. So using this instruction, the current content of Accumulator will be written to the memory location as pointed by 16-bit address as stored in the register pair. It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes STAX B 02 1 STAX D 12 1 STAX B is an example instruction of this type. It ... Read More

Instruction type LDAX rp in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

11K+ Views

In 8085 Instruction set, LDAX is a mnemonic that stands for LoaD Accumulator from memory pointed by eXtended register pair denoted as “rp” in the instruction. This instruction uses register indirect addressing for specifying the data. It occupies only 1-Byte in the memory. This rp can be either BC register pair represented by B or DE register pair represented by D.Note that LDAX H is not provided in 8085 instruction set. This is because, LDAX H is the same as MOV A, M in its function. Mnemonics, Operand Opcode(in HEX) Bytes LDAX B 0A 1 ... Read More

Instruction type XCHG in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

9K+ Views

In 8085 Instruction set, there is one mnemonic XCHG, which stands for eXCHanGe. This is an instruction to exchange contents of HL register pair with DE register pair. This instruction uses implied addressing mode. As it is1-Byte instruction, so It occupies only 1-Byte in the memory. After execution of this instruction, the content between H and D registers and L and E registers will get swapped respectively. Mnemonics, Operand Opcode(in HEX) Bytes XCHG EB 1 Let us suppose, HL and DE register pairs are having ABCDH and 6789H contents respectively. After execution of ... Read More

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