Found 558 Articles for Microprocessor

In 8085 Instruction set, DAD SP instruction is a special case of DAD rp instruction. In this instruction contents of HL and SP will get added and sum thus produced will get stored onto HL register pair. It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes DAD SP 39 1 Let us discuss about this instruction execution with one example. We are considering that HL and SP registers are having initial contents as 4050H and 5050H. So after execution of DAD SP instruction, the addition result will be 90A0H which will get ... Read More

In 8085 Instruction set, DCX SP instruction is used to decrement the SP contents by 1. DCX SP instruction is a special case of DCXrpinstruction which decreases the content of the register pair. This instruction occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes DCX SP 3B 1 Let us consider that the initial content of SP is 4050H. So after decrement of the content of SP by using DCX SP instruction, SP would have the value 404FH. Here is the required tracing table as below − Before After ... Read More

In 8085 Instruction set, INX SP instruction is used to increment the SP contents by 1. INX SP instruction is a special case of INX rp instruction which increases the content of the register pair. This instruction occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes INX SP 33 1 Let us consider that the initial content of SP is 4050H. So after increment of the content of SP by using INX SP instruction, SP would have the value 4051H. Here is the required tracing table as below − Before ... Read More

In 8085 Instruction set, XTHL is a mnemonic that stands for “eXchange Top of stack with HL”. This instruction exchanges the contents of the top two locations of the stack with the contents of register pair HL. Here it is not an exchange between SP with HL.It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes XTHL E3 1 The result of execution of this instruction XTHL is shown below with a sample instruction and along with tracing table. Let us consider HL and SP are having contents BBAAH and 4050H. And ... Read More

In 8085 Instruction set, SPHL is an instruction with the help of which Stack Pointer will get initialized with the contents of register pair HL. It is an indirect way of initializing the stack pointer. But it is not a very common and regularly usable instruction as well. It occupies only 1-Byte in memory, compared to the other instruction LXI SP instruction, which is 3-Bytes long used for initializing SP on the other hand. Due to this advantage, SPHL can be useful when SP is required to get initialized to a specific value a number of times in a program. ... Read More

In 8085 Instruction set, LXI SP, d16 instruction is a special case of LXI rp, d16. Using this instruction, we can load 16-bit immediate data/address on the Stack Pointer (SP). It occupies 3-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes LXI SP 31 3 Let us consider a sample instruction LXI SP, 4050H as an example of this category. The result of execution of this instruction has been shown in the following tracing table − Before After (SP) Any value 4050H Address Hex ... Read More

In 8085 Instruction set, PUSH rp instruction stores contents of register pair rp by pushing it into two locations above the top of the stack. rp stands for one of the following register pairs. rp = BC, DE, HL, or PSW As rp can have any of the four values, there are four opcodes for this type of instruction. It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes PUSH B C5 1 PUSH D D5 1 PUSH H E5 1 PUSH PSW F5 1 ... Read More

In 8085 Instruction set, with the mnemonic POP, we can pop out 2-Bytes from the top of the stack through rp i.e. register pair e.g. BC, DE, HL or AF. Here AF is a register pair formed with Flag and Accumulator registers and also known as PSW (Processor Status Word). In PSW, Accumulator is the MS Byte, and Flags register is the LS Byte. Mnemonics, Operand Opcode(in HEX) Bytes POP B C1 1 POP D D1 1 POP H E1 1 POP PSW F1 1 In the above ... Read More

In 8085 Instruction set, RAR stands for “Rotate Accumulator Right involving Cy flag in rotation”. It rotates the Accumulator contents to the right by 1-bit position. From the following Fig. we are getting the operation details. From the Fig. we can see that, during right rotate the least significant bit is coming out and will be copied on the Cy flag bit and the previous Cy flag bit will be moved to the most significant bit position of the Accumulator. It is 1-Byte instruction. And it is 9-bit rotation of Accumulator and Cy contents. Only Cy flag is ... Read More

In 8085 Instruction set, RRC stands for “Rotate Right Accumulator”. With the help of this instruction, we can rotate the Accumulator current content to the right by 1-bit position. The following Fig. will depict the rotation operation. In this right rotation, the least significant bit will come out from the Accumulator and will be copied to Cy bit in the flag register and also will be copied to the most significant bit position of the Accumulator. Notice that the Cy flag is not involved in the rotation, and it is only 8-bit rotation of Accumulator contents. ... Read More