Paging is a storage structure that enables the operating framework to fetch processes from the secondary storage into the main memory in the form of pages. In the Paging method, the main memory is split into small fixed-size blocks of physical memory, which is known as frames. The size of a frame must be preserved the same as that of a page to have maximum use of the main memory and to prevent external fragmentation.
Paging changes pages from the swap disk to frames of the physical memory therefore data can be accessed by the processor. Any page can involve any frame. This leads to multiple issues that should be undertaken by a paging system −
When should a page be changed into physical memory?
How does the CPU find data in physical memory, especially if its logical address is not the same as its physical address?
What arises when all the frames have pages and the CPU require to access data from a page not recently saved in physical memory?
All of these issues are managed by the memory management unit (MMU). As displayed in the figure, the logical address is output from the CPU to the MMU. The MMU converts this address to a physical address, which is supplied to the cache and physical memory. If the data is not placed in physical memory, it creates a page fault and changes the page from the swap disk to a frame, eliminating another page if essential.
Throughout this process, the CPU has no information as to the actual physical location it is accessing. For example, the relatively simple CPU instruction LDAC 4234H is not interpreted as “load the data from logical memory location 4234H, which is stored in physical memory location 3234H, into the accumulator. Rather it is more akin to “load the data from logical memory location 4234H into the accumulator,” and it doesn’t matter which physical memory location it currently occupies because the MMU will take care of that.
Simultaneously, physical memory doesn’t know which logical addresses are mapped to specific physical memory locations. In this example, the memory access is not interpreted as “output the data from location 3234H, which corresponds to logical address 4234H.
Instead, it is more like “output the data from location 3234H because that is where the MMU says the CPUs logical address is mapped to,” and it is not necessary to know what that logical address is. Neither the CPU nor memory needs to know the other’s memory address because the MMU handles the translation for them.