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General discussion about 8085 interrupts
The pins of Interrupt of 8085 are used by Input Output devices just for the initiation of the data transfer to or from 8085, without the wasting of the time of the CPU. As we have seen previously it is a very useful process when there is no well known Input Output timing characteristics, as it takes a very long time for getting ready of the device to perform the data transfer scheme. We have five interrupt pins of 8085 these are the input pins of 8085 which are named as TRAP, RST7.5, RST6.5, RST5.5 and INTR.
The point to be noted that RST7, RST6, and RST5 are the instructions of 8085, whereas RST7.5, RST6.5, and RST5.5 are interrupt pins of 8085. Without having any relation to the clock signal the interrupt pins can get even activated by the Input Output port even half way through an instruction. There is no checking of the interrupt pins at the end of any instruction when the instructions are in the branch group JMP, CALL, RET etc.
When any of the pins of the Input Output port is activated the interruption of the 8085 is done if any of the given conditions are satisfied. The interrupt system gets enabled by setting the interrupt enable (IE) flip-flop of 8085. This condition is not applicable for TRAP.
We do not activate the interrupts of higher priority.
The interrupts which is not masked this condition is called TRAP and INTR.
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