A register adequate for changing its binary data in one or both directions is known as a shift register. The logical design of a shift register includes a series of flip-flops, with the output of one flip-flop linked to the input of the next flip-flop.Operations of Shift RegisterThere are various modes of operations of shift registers which are as follows −Serial-In Serial-Out Shift RegisterThe controlling of shifting of information decides the ‘serial-in serial-out’ shift register into the right shift and left shift register. The diagram demonstrates a ‘serial-in serial-out’ right shift register.During the first clock pulse, the signal on the ... Read More

A register is a set of flip-flops with each flip-flop adequate for saving one bit of data. An n-bit register has a set of n flip-flops and is adequate for saving any binary data of n bits. In the flip-flops, a register can have combinational gates that implement specific data-processing operations.A register includes a set of flip-flops and gates that influence their change. The flip-flops manage the binary data and the gates control when and how current data is moved into the register.There are multiple kinds of registers that are accessible economically. The elementary register includes just flip-flops, with no ... Read More

The T flip-flop is also called toggle flip-flop. It is a change of the JK flip-flop. The T flip flop is received by relating both inputs of a JK flip-flop. The T flip-flop is received by relating the inputs ‘J’ and ‘K’. When T = 0, both AND gates are disabled. Therefore, there is no change in the output. When T= 1, the output toggles.The diagram demonstrates the circuit diagram of a T flip-flop.The truth table of T flip-flop is displayed in the table.QNTQN+1000011101110The logic symbol of the T flip-flop is shown in the figure.

The D flip-flop is a clocked flip-flop with a single digital input 'D'. Each time a D flip-flop is clocked, its output follows the state of 'D'. The D Flip Flop has only two inputs D and CP. The D inputs go precisely to the S input and its complement is used to the R input.Considering the pulse input is at 0, the outputs of gates 3 and 4 are at the 1 level and the circuit cannot convert state regardless of the value of D. The D input is sampled when CP = 1. If D is 1, the ... Read More

J-K flip-flop can be treated as an alteration of the S-R flip-flop. J represents SET, and 'K' represents CLEAR. In the JK flip-flop, the ‘S’ input is known as the ‘J’ input, and the ‘R’ input is known as the ‘K’ input. The output of the JK flip-flop does not modify if both ‘J’ and ‘K’ are ‘0’. If both the inputs are ‘1’, then the output dial to its free.The figure shows the circuit diagram of a JK flip-flop.The truth table of the JK flip-flop is displayed in the table.SRQN-100QN01010111$\overline{Q_{N}}$The logic symbol for the JK flip-flop is demonstrated in ... Read More

A signed-magnitude method is used by computers to implement floating-point operations. Signed-2’s complement method is used by most computers for arithmetic operations executed on integers. In this approach, the leftmost bit in the number is used for signifying the sign; 0 indicates a positive integer, and 1 indicates a negative integer. The remaining bits in the number supported the magnitude of the number.Example: -2410 is defined as −10011000In this example, the leftmost bit 1 defines negative, and the magnitude is 24.The magnitude for both positive and negative values is the same, but they change only with their signs.The range of ... Read More

A scheduling system consists of program tasks, a target machine, and a schedule in which a specific performance criterion is optimized.Program Tasks − The characteristics of a parallel program can be defined as the system (T,

The general scheduling problem has been described in different ways in different fields. The classical problem of job sequencing in production management has influenced most of the solutions to this problem, which generally assumes a set of resources that could provide service to a set of consumers. The main objective is to find an efficient policy for managing the access to the resources by the consumers to optimize some desired performance measures.In distributed systems, the scheduling problem arises because the concurrent parts of a program or set of programs must be arranged in time and space so that the overall ... Read More

There are two methods of cache-coherency which are as follows −Cache–Memory CoherenceIn a single cache system, coherence between memory and the cache is maintained using one of two policies − (1) write-through, and (2) write-back. When a task running on a processor P requests the data in memory location X, for example, the contents of X are copied to the cache, where it is passed on to P.When P updates the value of X in the cache, the other copy in memory also needs to be updated to maintain consistency. In write-through, the memory is updated every time the cache ... Read More

A shared memory model is one in which processors connects by reading and writing locations in a shared memory that is similarly applicable by all processors. Each processor can have registers, buffers, caches, and local memory banks as more memory resources. Some basic issues in the design of shared-memory systems have to be taken into consideration. These involves access control, synchronization, protection, and security.Access control specifies which process accesses are achievable to which resources. Access control models create the needed check for each access request issued by the processors to the shared memory, against the contents of the access control ... Read More