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8254 Control Word and Operating modes
Here we will see the control words and the operation modes of the 8254 programmable interval timer chip.
Before discussing its operating modes and control word properties, we should know about some important facts of this chip.
When the chip is powering up, the state is undefined. The mode, count value, and outputs are undefined in that time.
Each counter must be programmed before it is used. We do not need to program some unused counters.
Counters are programmed by writing the control words and then one initial count.
The structure of the counter is like this -
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SC1 | SC0 | RW1 | RW2 | M2 | M1 | M0 | BCD/Binary |
We can select the counter by the SC1 and SC0.
| SC1 | SC0 | Selection |
|---|---|---|
| 0 | 0 | Counter 0 |
| 0 | 1 | Counter 1 |
| 1 | 0 | Counter 2 |
| 1 | 1 | Read the back status |
The values of the RW1 and RW2 are used to denote the read and write operation.
| RW1 | RW0 | Selection |
|---|---|---|
| 0 | 0 | Counter Latch command |
| 0 | 1 | Read or Write the lower byte |
| 1 | 0 | Read or Write the upper byte |
| 1 | 1 | Read or Write lower byte followed by upper byte |
Three bits of M2, M1 and M0 are used to decide programming modes. These are like below:
| M2 | M1 | M0 | Operating Mode |
|---|---|---|---|
| 0 | 0 | 0 | Mode 0 |
| 0 | 0 | 1 | Mode 1 |
| X | 1 | 0 | Mode 2 |
| X | 1 | 1 | Mode 3 |
| 1 | 0 | 0 | Mode 4 |
| 1 | 0 | 1 | Mode 5 |
The last bit (LSb) of the control word is used to select whether the counting will be in Binary or BCD. If this is 0, it will act like binary counter, otherwise it will act like BCD counter.
Now let us see those six operating modes of 8254 chip:
| Mode | Type | Description |
|---|---|---|
| Mode 0 | Interrupt and Terminal Count | This is used for event counting. After writing the control word, OUT is low at first. It will remain low until the counter reaches 0, it is decremented by 1 after each clock cycle. Then the OUT goes high, and remains high until a new count is there or a new Mode 0 control word is written into the counter. The GATE = 1 indicates enable counting, and 0 indicates disable counting. |
| Mode 1 | Hardware Retriggerable One Shot | OUT will be high at first, it will go Low on the clock pulse following a trigger to begin the one shot pulse. It will remain 0 until the counter reaches 0. |
| Mode 2 | Rate Generator | Initially OUT is low. When the counting is enabled, it goes high. This process repeats periodically. This mode is used as frequency divider. |
| Mode 3 | Square wave generator | If the GATE is 1, then the counting is enabled, otherwise it is disabled. This mode is used to generate the square wave. The time period is equal to count. If the count is even, the on-time of wave is count/2. Otherwise on-time is (count+1)/2 and off-time is (count-1)/2. |
| Mode 4 | Software Triggered Strobe | If the GATE is 1, then the counting is enabled, otherwise it is disabled. Initial OUT value is high and go low when count is at the last stage. The count is reloaded again for subsequent clock pulse. |
| Mode 5 | Hardware Triggered Strobe | Initially the OUT is high. The counting is triggered by the rising edge of the GATE. When initial count is expired the OUT becomes low for one clock pulse, then high again. After writing the control word and the initial count, the counter will not be loaded until clock pulse after one trigger. |
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