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Defining Dependencies in Makefile

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It is very common that a final binary will be dependent on various source code and source header files. Dependencies are important because they tell to make about the source for any target. Consider the following example

hello: main.o factorial.o hello.o
	$(CC) main.o factorial.o hello.o -o hello

Here we are telling to make that hello is dependent on main.o, factorial.o and hello.o so whenever there is a change in any of these object files then make will take action.

Same time we would have to tell to make how to prepare .o files so we would have to define those dependencies also as follows
main.o: main.cpp functions.h
	$(CC) -c main.cpp

factorial.o: factorial.cpp functions.h
	$(CC) -c factorial.cpp

hello.o: hello.cpp functions.h
	$(CC) -c hello.cpp



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