Found 475 Articles for 8085

Instruction type XTHL in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, XTHL is a mnemonic that stands for “eXchange Top of stack with HL”. This instruction exchanges the contents of the top two locations of the stack with the contents of register pair HL. Here it is not an exchange between SP with HL.It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes XTHL E3 1 The result of execution of this instruction XTHL is shown below with a sample instruction and along with tracing table. Let us consider HL and SP are having contents BBAAH and 4050H. And ... Read More

Instruction type SPHL in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, SPHL is an instruction with the help of which Stack Pointer will get initialized with the contents of register pair HL. It is an indirect way of initializing the stack pointer. But it is not a very common and regularly usable instruction as well. It occupies only 1-Byte in memory, compared to the other instruction LXI SP instruction, which is 3-Bytes long used for initializing SP on the other hand. Due to this advantage, SPHL can be useful when SP is required to get initialized to a specific value a number of times in a program. ... Read More

Instruction type LXI SP, d16 in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, LXI SP, d16 instruction is a special case of LXI rp, d16. Using this instruction, we can load 16-bit immediate data/address on the Stack Pointer (SP). It occupies 3-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes LXI SP 31 3 Let us consider a sample instruction LXI SP, 4050H as an example of this category. The result of execution of this instruction has been shown in the following tracing table − Before After (SP) Any value 4050H Address Hex ... Read More

Instruction type PUSH rp in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, PUSH rp instruction stores contents of register pair rp by pushing it into two locations above the top of the stack. rp stands for one of the following register pairs. rp = BC, DE, HL, or PSW As rp can have any of the four values, there are four opcodes for this type of instruction. It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes PUSH B C5 1 PUSH D D5 1 PUSH H E5 1 PUSH PSW F5 1 ... Read More

Instruction type POP rp in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, with the mnemonic POP, we can pop out 2-Bytes from the top of the stack through rp i.e. register pair e.g. BC, DE, HL or AF. Here AF is a register pair formed with Flag and Accumulator registers and also known as PSW (Processor Status Word). In PSW, Accumulator is the MS Byte, and Flags register is the LS Byte. Mnemonics, Operand Opcode(in HEX) Bytes POP B C1 1 POP D D1 1 POP H E1 1 POP PSW F1 1 In the above ... Read More

Instruction type RAR in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, RAR stands for “Rotate Accumulator Right involving Cy flag in rotation”. It rotates the Accumulator contents to the right by 1-bit position. From the following Fig. we are getting the operation details. From the Fig. we can see that, during right rotate the least significant bit is coming out and will be copied on the Cy flag bit and the previous Cy flag bit will be moved to the most significant bit position of the Accumulator. It is 1-Byte instruction. And it is 9-bit rotation of Accumulator and Cy contents. Only Cy flag is ... Read More

Instruction type RRC in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

6K+ Views

In 8085 Instruction set, RRC stands for “Rotate Right Accumulator”. With the help of this instruction, we can rotate the Accumulator current content to the right by 1-bit position. The following Fig. will depict the rotation operation. In this right rotation, the least significant bit will come out from the Accumulator and will be copied to Cy bit in the flag register and also will be copied to the most significant bit position of the Accumulator. Notice that the Cy flag is not involved in the rotation, and it is only 8-bit rotation of Accumulator contents. ... Read More

Instruction type RAL in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

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In 8085 Instruction set, there is another mnemonic RAL, which stands or Rotate Accumulator Left and also involving Cy flag in rotation. It rotates the Accumulator contents to the left by 1-bit position. The following Fig. is depicting the execution logic of the instruction.From the Fig. we can see that the due to left rotation the bit which is coming out from the most significant place will be copied to the Cy flag bit. And the previous Cy bit will be moved to least significant bit place of the Accumulator. Thus it is a 9-bit rotation of Accumulator and Cy ... Read More

Instruction type RLC in 8085 Microprocessor

karthikeya Boyini
Updated on 30-Jul-2019 22:30:23

7K+ Views

In 8085 Instruction set, there is one mnemonic RLC stands for “Rotate Left Accumulator”. It rotates the Accumulator contents to the left by 1-bit position. The following Fig. shows the operation explicitly. In this fig. it has been depicted that the most significant bit of the Accumulator will come out and left rotate will create an empty space at the least significant bit place and this come out bit will be copied at the empty bit place and also on the Cy bit in the flag register. Thus, Cy flag gets a copy of the bit moved out ... Read More

Instruction type CPI d8 in 8085 Microprocessor

Samual Sam
Updated on 30-Jul-2019 22:30:23

4K+ Views

In 8085 Instruction set, CPI is a mnemonic that stands for “ComPare Immediate with Accumulator” and here d8 stands for any 8-bit data or 1-Byte data. This instruction is used to compare Accumulator with 8-bit immediate data. The result of the comparison will be stored in an internal register not accessible to the programmer. As this internal register is not a GPR (General Purpose Register), so not accessible through any mnemonics. Actually this 8-bit data will get deducted from Accumulators present content and result thus produced will be stored in the internal register. All the flags are affected based on ... Read More

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