What are the layouts of the rename buffers?

The layout of the rename buffers establishes the actual framework for renaming. There are three basic components are the type and the number of the rename buffers and the basic mechanism which is used for accessing rename buffers as displayed in the figure.

Type of rename buffers

The chosen type of rename buffers has the largest impact on renaming. It is definitive for the basic approach of the implementation and thus it determines where the intermediate results of the instruction are to be written into or read form. It can be designated as intermediate results which have already been generated but are not yet qualified to modify the actual program state by writing them into the architectural registers.

Number of rename buffers

The following table shows an overview of how many rename buffers are provided by recent processors. Each of the three sections of the table covers a different implementation type. In the first section, we list processors that use a merged register file for architectural and rename registers. In these processors, it can find quite a large number of additional registers which can be used for renaming. The number of rename buffers ranges from 8 in the Power1, up to 32 in the R10000, and even 38 in the 64-bit Sparc-processor PM1 (Sparc64).

Number of rename buffers provided

Implementation of renamingNumber of rename buffers
Processor typeFXFP
Merged rename and arch. Register file

Power1 (1990)
(32 arch. + 8 rename)
Power2 (1993)
(32 arch. + 22 rename)
ES/9000 (1992p)16
(16 arch. + 16 ren.)
(4 arch. + 12 rename)
PM1 (1995)38
(78 arch. + 38 ren.)
(32 arch. + 24 rename)
R10000 (1996)32
(32 arch. + 32 ren.)
(32 arch. + 32 rename)
Separate rename register file

PowerPC 603 (1993)n.a.4
PowerPC 604 (1995)128
PowerPC 620 (1996)88
Renaming within the ROB

Am29000 sup (1995)10
K5 (1995)16
PentiumPro (1995)40

Basic mechanisms used for accessing rename buffers

Rename buffers need to be accessed for several purposes, such as to fetch operands, to update them, or to deallocate them. There are two entirely different access mechanisms available as an associative mechanism and an indexed access mechanism.

Associative access mechanism − Rename buffers with associative access hold typically three kinds of information such as the destination register number, their values, and necessary status information. In this scheme, when a register content is to be fetched, say that of r2, all entries are looked up associatively to find the particular entry whose destination register field matches r2.

Indexed access mechanism − The other fundamentally different access mechanism is the indexed access mechanism. In this case, a mapping table is used to obtain the actual index into the rename buffer file. The mapping table contains for register r2 the index ‘3’. Thus, the register value of ‘20’ will be accessed from the corresponding entry no.3 in the rename buffer.