Data Structure
Networking
RDBMS
Operating System
Java
MS Excel
iOS
HTML
CSS
Android
Python
C Programming
C++
C#
MongoDB
MySQL
Javascript
PHP
Physics
Chemistry
Biology
Mathematics
English
Economics
Psychology
Social Studies
Fashion Studies
Legal Studies
- Selected Reading
- UPSC IAS Exams Notes
- Developer's Best Practices
- Questions and Answers
- Effective Resume Writing
- HR Interview Questions
- Computer Glossary
- Who is Who
Instruction cycle in 8085 Microprocessor
The Program and data which are stored in the memory, are used externally to the microprocessor for executing the complete instruction cycle. Thus to execute a complete instruction of the program, the following steps should be performed by the 8085 microprocessor.
Fetching the opcode from the memory;
Decoding the opcode to identify the specific set of instructions;
Fetching the remaining Bytes left for the instruction, if the instruction length is of 2 Bytes or 3 Bytes;
Executing the complete instruction procedure.
The given steps altogether constitute the complete instruction cycle. These above mentioned steps are described in detail later. The above instructions are assumed by us for being in the memory, at the specified locations allocated for the memory.
The points to be noted as without fetching of the opcode from the memory the complete instruction would remain incomplete. Secondly decoding should be done, thirdly the fetching process should be done depending on the instruction length. Thirdly the complete execution process should be carried out to complete the entire process of execution.
To have a better idea on Instruction Cycle, let us consider the instruction DCX SP and its instruction cycle into details –
In 8085 Instruction set, DCX SP instruction is used to decrement the SP contents by 1. DCX SP instruction is a special case of DCX rp instruction which decreases the content of the register pair. This instruction occupies only 1-Byte in memory.
| Mnemonics, Operand | Opcode (in HEX) | Bytes |
|---|---|---|
| DCX SP | 3B | 1 |
Let us consider that the initial content of SP is 4050H. So after decrement of the content of SP by using DCX SP instruction, SP would have the value 404FH. Here is the required tracing table as below –
| Before | After | |
|---|---|---|
| (SP) | 4050H | 404FH |
Here is the required tracing table as below –
| Address | Hex Codes | Mnemonic | Comment |
|---|---|---|---|
| 2003 | 3B | DCX SP | SP <-SP – 1 |
The timing diagram against this instruction DCX SP execution is as follows –
Summary: So this instruction DCX SP requires 1-Byte, 1-Machine Cycle (Opcode Fetch) and 6 T-States for execution as shown in the timing diagram.
3K+ Views
