- Trending Categories
- Data Structure
- Operating System
- C Programming
- Selected Reading
- UPSC IAS Exams Notes
- Developer's Best Practices
- Questions and Answers
- Effective Resume Writing
- HR Interview Questions
- Computer Glossary
- Who is Who
Explain the methods of reducing the number of microinstructions in computer architecture?
In this section, there are two ways to take advantage of this redundancy to reduce the number of microinstructions needed by the control unit. The first method uses microsubroutines to combine repeated micro-operations into a single block of micro-instructions, which are accessed by two or more execute routines. The other method uses microcode jump to access microinstruction shared by two or more routines.
Just as high-level and assembly language codes use subroutines, a microsequencer can also use microsubroutines. As with high-level code, a microsequencer uses microsubroutines for sequences of actions that are performed in more than one routine in a microcode. The microsequencer hardware must be enhanced to implement the micro-subroutine calls and returns.
The states LDAC1, LDAC2, and LDAC3 perform the same microoperations as states STAC1, STAC2, and STAC3, respectively. In each case, the three states obtain a 16-bit address from memory and load it into AR.
Although the microsubroutine occurs directly after FETCH3, it cannot be called from that state because FETCH3 must map to the correct execute routine. The microsequencer could not generate the right return address. To resolve this, it can create dummy states LDAC0 and STAC0. FETCH3 maps to one of these states when an LDAC or STAC instruction is decoded. These states perform no micro-operations and call the microsubroutine.
The microsubroutine returns to the next location, which contains LDAC4 or STAC4. The new state assignments are displayed in the table. The SUB1, SUB2, and SUB3 perform the same micro-operations as LDAC1 (STAC1), LDAC2 (STAC2), and LDAC3 (STAC3), respectively.
Revised state assignments for the simple CPU
When a microsubroutine is called, the address of the routine is supplied by the ADDR output of the microcode memory. The microsequencer must store the return address so it can continue once the subroutine terminates. If a microinstruction at address X calls a microsubroutine, the routine must return to the address X + 1.
The conditional and unconditional jump instructions have several states that perform the same micro-operations. This is to be expected since, if a jump is to be taken, it is processed in the same way. This redundancy can be eliminated by creating a microsubroutine. It can modify the state diagram so that these instructions access the same states directly. One set of states will perform a jump and another set will handle a conditional jump not taken. The routine will branch to the correct states.
The JUMP1, JUMP2, and JUMP3 are identical to JMPZY1, JMPZY2, and JMPZY3 and also to JPNZY1, JPNZY2, and JPNZY3, all but the JUMP states are eliminated.
- Explain the performance of cache in computer architecture?
- What are the methods of cache-coherency in computer architecture?
- Explain the architecture of JDBC?
- Explain the architecture of DBMS?
- Explain the various DMA transfer modes in computer architecture?
- What are different methods of parallelism in Parallel Computer Architecture?
- What is the Evolution of Computer Architecture?
- What are the interpretations of the theory of computer architecture?
- Explain the performance of Addition and Subtraction with signed magnitude data in computer architecture?
- Explain the architecture of Java Swing in Java?
- What are the conditions of Parallelism in Computer Architecture?
- What are the types of Parallelism in Computer Architecture?
- What is the structure of Pipelining in Computer Architecture?
- What is the purpose of Complements in Computer Architecture?
- What is the Format of Microinstruction in Computer Architecture?