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Articles by karthikeya Boyini
Page 141 of 142
Instruction type RLC in 8085 Microprocessor
In 8085 Instruction set, there is one mnemonic RLC stands for “Rotate Left Accumulator”. It rotates the Accumulator contents to the left by 1-bit position. The following Fig. shows the operation explicitly. In this fig. it has been depicted that the most significant bit of the Accumulator will come out and left rotate will create an empty space at the least significant bit place and this come out bit will be copied at the empty bit place and also on the Cy bit in the flag register. Thus, Cy flag gets a copy of the bit moved out ...
Read MoreInstruction type RRC in 8085 Microprocessor
In 8085 Instruction set, RRC stands for “Rotate Right Accumulator”. With the help of this instruction, we can rotate the Accumulator current content to the right by 1-bit position. The following Fig. will depict the rotation operation. In this right rotation, the least significant bit will come out from the Accumulator and will be copied to Cy bit in the flag register and also will be copied to the most significant bit position of the Accumulator. Notice that the Cy flag is not involved in the rotation, and it is only 8-bit rotation of Accumulator contents. ...
Read MoreInstruction type POP rp in 8085 Microprocessor
In 8085 Instruction set, with the mnemonic POP, we can pop out 2-Bytes from the top of the stack through rp i.e. register pair e.g. BC, DE, HL or AF. Here AF is a register pair formed with Flag and Accumulator registers and also known as PSW (Processor Status Word). In PSW, Accumulator is the MS Byte, and Flags register is the LS Byte. Mnemonics, Operand Opcode(in HEX) Bytes POP B C1 1 POP D D1 1 POP H E1 1 POP PSW F1 1 In the above ...
Read MoreInstruction type NOP in 8085 Microprocessor
In 8085 Instruction set, NOP is an instruction which is falling under Machine Control Instruction category. NOP is a mnemonic that stands for “No Operation”. This instruction does nothing during execution. Only it occupied 1-Byte of memory space and spends 4-Machine Cycles. Mnemonics, Operand Opcode(in HEX) Bytes NOP 00 1 In spite of the fact that it does nothing, still it has got many different applications. It is useful in the following cases − NOP instruction can be used to create small-time delay in the execution of the code. It is very ...
Read MoreThe Best C++ Code Formatter/Beautifier?
There are so many C++ code formatter or beautifier tools which beautifies your code or format with proper indentation. The C++ code formatter/ beautifier are listed as follows − C++ Code Formatter/Beautifier Description Astyle This is a source code formatter. It can be used for C++, java and other languages. It’s latest version is 2.03 and it released in April 2013. Clang-Format It is a command line tool along with clang compiler. It is open- source tool and programmed in C++, python. The latest version is 3.3. Universal Indent GUI It ...
Read MoreStack and Queue in Python using queue Module
In Python, it is very easy to implement stack and queue data structures. Stack is called LIFO because Stack works on the principle of "Last-in, first-out" and Queue is called FIFO because Queue works on the principle of "First-in, first-out", and the inbuilt functions in Python make the code shorter and simple. The Queue module implements multi-producer, multi-consumer queues and It is especially useful in threaded programming when information must be exchanged safely between multiple threads. The Queue class in this module implements all the required locking semantics and it depends on the availability of thread support in Python. This ...
Read MoreIntroduction to Algorithms for Mathematical Problems
In this section we will see some common mathematical problems and their possible way solve using different computational algorithms. We will see how to solve differential equations, integrations and some other complex mathematical problems. In this Section We are going to cover − Convert Infix to Postfix Expression Convert Infix to Prefix Expression Evaluate Postfix Expression Secant method to solve non-linear equation Trapezoidal Rule for definite integral Simpson's 1/3 Rule for definite integral Linear Regression Lagrange Interpolation Runge-Kutta 4th order rule for differential equation Lucky Numbers Decimal to Binary conversion Find LCM of two numbers Find ...
Read MoreInstruction type MOV r1, r2 in 8085 Microprocessor
In 8085 Instruction set, MOV is a mnemonic, which stands for “MOVe”. In this instruction 8-bit data value in register r2 will be moved to the 8-bit register r1. Note that in 8085 instructions, as the first operand specifies the destination, and the second one the source, so here also r1 is destination register and r2 is the source register. This instruction uses register addressing for specifying the data. Here, “r1” and “r2”can be any one of the following registers. r1, r2 = A, B, C, D, E, H, or L As r1 can have any one of ...
Read MoreInstruction type LDA a16 in 8085 Microprocessor
In 8085 Instruction set, LDA is a mnemonic that stands for LoaD Accumulator with the contents from memory. In this instructionAccumulatorwill get initialized with 8-bit content from the 16-bit memory address as indicated in the instruction as a16. This instruction uses absolute addressing for specifying the data. It occupies 3-Bytes in the memory. First Byte specifies the opcode, and the successive 2-Bytes provide the 16-bit address, i.e. 1-Byte each for each memory location. Mnemonics, Operand Opcode(in HEX) Bytes LDA Address 3A 3 Let us consider LDA 4050H as an example instruction of this type. ...
Read MoreInstruction type XCHG in 8085 Microprocessor
In 8085 Instruction set, there is one mnemonic XCHG, which stands for eXCHanGe. This is an instruction to exchange contents of HL register pair with DE register pair. This instruction uses implied addressing mode. As it is1-Byte instruction, so It occupies only 1-Byte in the memory. After execution of this instruction, the content between H and D registers and L and E registers will get swapped respectively. Mnemonics, Operand Opcode(in HEX) Bytes XCHG EB 1 Let us suppose, HL and DE register pairs are having ABCDH and 6789H contents respectively. After execution of ...
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