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Microprocessor - 8085 Branching Instructions

The following table shows the list of Branching instructions with their meanings.

Opcode Operand Meaning Explanation
JMP 16-bit address Jump unconditionally The program sequence is transferred to the memory address given in the operand.
Opcode Description Flag Status
JC Jump on Carry CY=1
JNC Jump on no Carry CY=0
JP Jump on positive S=0
JM Jump on minus S=1
JZ Jump on zero Z=1
JNZ Jump on no zero Z=0
JPE Jump on parity even P=1
JPO Jump on parity odd P=0
16-bit address Jump conditionally The program sequence is transferred to the memory address given in the operand based on the specified flag of the PSW.
Opcode Description Flag Status
CC Call on Carry CY=1
CNC Call on no Carry CY=0
CP Call on positive S=0
CM Call on minus S=1
CZ Call on zero Z=1
CNZ Call on no zero Z=0
CPE Call on parity even P=1
CPO Call on parity odd P=0
16-bit address Unconditional subroutine call The program sequence is transferred to the memory address given in the operand. Before transferring, the address of the next instruction after CALL is pushed onto the stack.
RET None Return from subroutine unconditionally The program sequence is transferred from the subroutine to the calling program.
Opcode Description Flag Status
RC Return on Carry CY=1
RNC Return on no Carry CY=0
RP Return on positive S=0
RM Return on minus S=1
RZ Return on zero Z=1
RNZ Return on no zero Z=0
RPE Return on parity even P=1
RPO Return on parity odd P=0
None Return from subroutine conditionally The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW and the program execution begins at the new address.
PCHL None Load the program counter with HL contents The contents of registers H & L are copied into the program counter. The contents of H are placed as the high-order byte and the contents of L as the loworder byte.
RST 0-7 Restart The RST instruction is used as software instructions in a program to transfer the program execution to one of the following eight locations.
Instruction Restart Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
The 8085 has additionally 4 interrupts, which can generate RST instructions internally and doesn’t require any external hardware. Following are those instructions and their Restart addresses −
Interrupt Restart Address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
microprocessor_8085_instruction_sets.htm
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