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Instructions to perform AND operation in 8085 Microprocessor
In 8085 Instruction set, and specially in its logical group of instructions, we have AND, OR, XOR, NOT type of instructions. 8085 does not have instructions to perform NAND, NOR, XNOR operations directly. Now let us discuss the instructions to perform AND operations only.
To perform ANDing of two numbers, 8085 imposes the restriction that one of the operands must be kept in the Accumulator. The other operand can be at any one of the following possible locations −
| Classifications | Examples |
|---|---|
| The other operand can be kept in 8-bit immediate data in the instruction. | ANI 43H ANI FFH |
| The other 8-bit operand can be kept in a memory location and whose memory address will be pointed by HL register pair. | ANA M |
| The other 8-bit operand can be kept in a 8-bit register | ANA B ANA C |
Here is the list of instructions available in 8085 instruction set suitable for ANDing operations −
| Mnemonics, Operand | Opcode (in HEX) | Bytes |
|---|---|---|
| ANA A | A7 | 1 |
| ANA B | A0 | 1 |
| ANA C | A1 | 1 |
| ANA D | A2 | 1 |
| ANA E | A3 | 1 |
| ANA H | A4 | 1 |
| ANA L | A5 | 1 |
| ANA M | A6 | 1 |
| ANI Data | E6 | 2 |
The AND operation performs bit-wise AND of the two operands. If X is a bit of Accumulator, and Y is a bit of the other operand in the same bit position, the AND operation is performed as per the following truth table.
Truth Table for AND Operation
| X | Y | X AND Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The AND instruction will affect the flag register bits as follows −
- S, P, and Z flags are updated based on the result
- Cy flag is reset to 0
- AC flag is set to 1.
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