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What is Guarded execution in computer architecture?
Guarded execution is a means to eliminate; at least partly, conditional branches. The idea is to introduce conditional operate instructions into the architecture and use them to replace conditional branches. Conditional operate instructions are called guarded instructions. A guarded instruction consists of two parts, a conditional part called the guard and an operational part which is a traditional instruction. It can be expressed, for instance, in the form −
(guard) instruction
The execution of guarded instruction depends on the following condition: if the specified guard is true, the associated instruction will be executed; if the guard turns out to be false, the instruction behaves like a NOP.
For instance, the α architecture provides conditional move instructions which are guarded instructions, with the following syntax and semantics (DEC, 1992) −
cmovxx ra.rq, rb.rq, rc.wq cmovxx ra.rq, #b.ib, rc.wq
where
xx indicates a condition
ra.rq is an integer, read-only 64-bit operand stored in register ra
rb.rq is an integer, read-only 64-bit operand stored in register rb
rc.wq is an integer, write-only 64-bit operand stored in register rc
#b.ib is an integer 64-bit literal
This instruction operates as follows. Register ra is tested.
The instruction mnemonics specify the condition of the guarded execution −
cmoveq // cmove if the contents of register ra are equal to zero
cmovge // cmove if the contents of register ra are greater than or equal to zero
cmovgt // cmove if the contents of register ra are greater than zero
cmovlbc // cmove if the low bit of register ra is clear
cmovlbs // cmove if the low bit of register ra is set
cmovle // cmove if the contents of register ra are less than or equal to zero
cmovlt // cmove if the contents of register ra are less than zero
cmovne // cmove if the contents of register ra are not equal to zero
Forward conditional branches can be eliminated by using guarded instructions with the opposite condition as specified in the corresponding conditional branch. For instance, consider the code sequence
beq ra, label // if (ra)=0 branch to ‘label’ or rb, rb, rc // else move (rb) into rc
The SPARC V9 (1994) also offers some similar conditional move instructions. The HP Precision Architecture (1985) introduced guarded instructions in a more comprehensive way than the DEC α. Here, all integer operate instructions are guarded instructions of the form
opcode.cond operands
The given condition (cond) relates to the result of the operation. If the specified condition is true, for instance, the result is positive, the following instructions will be nullified.
There are two types of guarding execution such as full guarding and restricted guarding. In full guarding all instructions are assumed to be guarded, whereas in restricted guarding only operating instructions (ALU instructions) have a guarded form.
This restricted form of guarding takes into account the fact that in existing architectures the instruction code space is usually squeezed and in most cases only a few additional bits are available for specifying guard conditions.
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