Programmer's view of 6800

In this section, we will see the basic architecture of the Motorola M6800 Microprocessor, and different registers to write programs into it.

To write programs we have to care about the registers and some instructions to access them during program execution. 

So from this diagram, we can see that there are two 8-bit Accumulators A and B, some 16-bit registers (Program Counter PC, Index Register IX, Stack Pointer SP), and 8-bit flag register CCR.

Both of the Accumulators Aand B have the same prominence in the Instruction set. There are very few instructions in 6800, where the Accumulator A is used but B is not used. Some of m  are 

• ABA (It adds A with Band stores the result into A), but there is no AAB instruction.

• Similarly, there is SBA (Subtract B from A and store result in A), but there is no SAB

• CBA (Compare B with A, and save the result in a temporary register), but there is no CAB.

• TAP (This is used to transfer A to Flag register CCR), but there is no TBP

• TPA (This is used to transfer flag register CCR content into A), but there is no TPB

Flags in MotorolaM6800

In M6800, the flag register is denoted by CCR (Condition Code Register). There are only six flag bits out of eight. These flags are located at the least significant position of the register. The two Most significant bits are always in the high state.

The flag register looks like this:

In 8085 MPU, there was parity (P) flag. That flag bit is omitted in this Microprocessor. It was not so useful. For the IM flag, when the IM is 1, it means, the interrupt request will be masked or disabled. So even if the IRQ is activated, it will be ignored. But if the higher priority is NMI activated at the same time, it will be interrupted. The IM flag can be reset to 0 by using the CLI (Clear Interrupt Mask) instruction. The inverse operation can be done by using the SEI (Set InterruptMask) instruction.

Ankith Reddy

Published on 28-Dec-2018 10:54:11

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