Internal RAM organization of Intel 8051

Microprocessor8085

Internal RAM of the 8051microcontroller has two parts. First one for register banks, bit addressable memory locations, stacks etc. Another part is the SFR(Special function register) area. Only 21 addresses in the SFR area can be used in this microcontroller. Out of these 21 locations, 11are bit-addressable SFR locations.

The bit addressable SFRs are like below -

Register
Byte address
Bit-address
P0 (Port 0)
80H
80H to 87H
P1 (Port 1)
90H
90H to 97H
P2 (Port 2)
A0H
A0H to A7H
P3 (Port 3)
B0H
B0H to B7H
PSW
D0H
D0H to D7H
Register A (Accumulator)
E0H
E0H to E7H
Register B
F0H
F0H to F7H
TCON (Timer Control)
88H
88H to 8FH
SCON (Serial Control)
98H
98H to 9FH
IE (Interrupt Enable)
A8H
A8H to AFH
IP (Interrupt Priority)
B8H
B8H to BFH


Now let us see the PSW register in detail.

The PSW (Program StatusWord) is basically the conventional flag registers. It isBit-Addressable SFR. The Byte address of PSW is D0H. Though the bit range D0H to D7H are considered as PSW, only 7 bits are valid.

Flag Bit
Bit Address
Description
Cy
D7H
Carry Flag. It is affected by executing instructions like Add, Sub, rotate through carrying etc. It also be used as the 1-bit accumulator
Ac
D6H
Auxiliary Carry Flag. This is used for BCD operations. This flag is not directly used by the user.
F0
D5H
It is user defined flag bit. This flag is general purpose.
RS1 and RS1
D4H and D3H
These two bits are used for register select. The four register banks can be selected by these two flags.
Ov
D2H
This is the overflow flag. When after addition or subtraction the result is outside the signed 8-bit range (-128 to 127), this flag is enabled
X
D1H
This is reserved for future use.
P
D0H
This is the parity flag. After executing an instruction, it checks the number of 1s in the accumulator and based on that it is enabled or disabled.


The 8085 had the Z-flag(Zero flag). That flag is not implemented in this 8051Microcontroller. Here it can check for zero or non-zero condition by testing the accumulator contents directly.

The RS1 and RS0 is used like this to select the register banks -

RS1
RS0
Register Bank
0
0
Register Bank 0
0
1
Register Bank 1
1
0
Register Bank 2
1
1
Register Bank 3


We have shown the 11 addressable bits. The remaining 10 bits are not bit-addressable.

Register
Byte address
SP (Stack Pointer)
81H
DPL (Data Pointer Low)
82H
DPH (Data Pointer High)
83H
PCON (Power Control)
87H
TMOD (Timer Mode)
89H
TL0 (Timer0 Low)
8AH
TL1 (Timer1 Low)
8BH
TH0 (Timer0 High)
8CH
TH1 (Timer1 Low)
8DH
SBUF (Serial Buffer)
99H


After resetting the 8051, the SFA will follow the following rules

  • Stack Pointer will hold 07H

  • All ports (P0 to P3)will contain FFH

  • SBUF will hold garbage value

  • All other SFAs will hold 00H

raja
Published on 31-Dec-2018 11:12:02
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