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Data transfer group in 8051
In 8051 Microcontroller there is 28 different instructions under the Data Transfer Group. In total there are 79 opcodes. The flags are not affected by using the data transfer instructions, but the P (Parity) flag may change if the value of A register is changed using Data Transfer Instruction. Similarly, when a data is transferred to the PSW register, the flags will change.
In the following table, we will see the Mnemonics, Lengths, Execution Time in terms of the machine cycle, Number of Opcodes etc.
| Mnemonics | Byte Count | Execution Time | Opcode Count |
|---|---|---|---|
| MOV A, Rn | 1 | 1 | 8 |
| MOV A, a8 | 2 | 1 | 1 |
| MOV A, @Ri | 1 | 1 | 2 |
| MOV A, #d8 | 2 | 1 | 1 |
| MOV Rn, A | 1 | 1 | 8 |
| MOV Rn, a8 | 2 | 2 | 8 |
| MOV Rn, #d8 | 2 | 1 | 8 |
| MOV a8, A | 2 | 1 | 1 |
| MOV a8, Rn | 2 | 2 | 8 |
| MOV a8, a8 | 3 | 2 | 1 |
| MOV a8, @Ri | 2 | 2 | 2 |
| MOV a8, #d8 | 3 | 2 | 1 |
| MOV @Ri, A | 1 | 1 | 2 |
| MOV @Ri, a8 | 2 | 2 | 2 |
| MOV @Ri, #d8 | 2 | 1 | 2 |
| MOV DPTR, #d16 | 3 | 2 | 1 |
| MOVC A, @A+DPTR | 1 | 2 | 1 |
| MOVC A, @A+PC | 1 | 2 | 1 |
| MOVX A, @Ri | 1 | 2 | 2 |
| MOVX A, @DPTR | 1 | 2 | 1 |
| MOVX @Ri, A | 1 | 2 | 2 |
| MOVX @DPTR, A | 1 | 2 | 1 |
| PUSH a8 | 2 | 2 | 1 |
| POP a8 | 2 | 2 | 1 |
| XCH A, Rn | 1 | 1 | 8 |
| XCH A, a8 | 2 | 1 | 1 |
| XCH A, @Ri | 1 | 1 | 2 |
| XCHD A, @Ri | 1 | 1 | 2 |
If the Clock Frequency is 12MHz, then 1 machine cycle will take 1 µs for execution.
Examples
| Sr.No | Instruction & Description |
|---|---|
| 1 | MOV R2, 35H It is an example of MOV Rn, a8. The content of location 35H of internal memory is moved to register R2. |
| 2 | MOV 0F0H, #12H It is an example of type MOV a8, #d8. Here the12H will be stored at register B. The equivalent instruction of this one is MOV B, #25H |
| 3 | PUSH 0F0H This is an example of PUSH a8. Here the contents of register B is pushed on the stack. |
| 4 | POP 40H This is like POP a8. It indicates the content of stack top is moved to the internal RAM location 40H. |
| 5 | XCH A, R2 This is like XCH A, Rn. This instruction is used to exchange the content of A and register R2. |
| 6 | XCHD A @R0 This instruction is like the instruction XCHD A,@Ri. Using this instruction the LS digit of A and LS digit of internal RAM location, which is pointed by R0 are swapped. |
Updated on: 27-Jun-2020
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