Microprocessor Articles - Page 59 of 42

In 8085 Instruction set, there is one mnemonic XCHG, which stands for eXCHanGe. This is an instruction to exchange contents of HL register pair with DE register pair. This instruction uses implied addressing mode. As it is1-Byte instruction, so It occupies only 1-Byte in the memory. After execution of this instruction, the content between H and D registers and L and E registers will get swapped respectively. Mnemonics, Operand Opcode(in HEX) Bytes XCHG EB 1 Let us suppose, HL and DE register pairs are having ABCDH and 6789H contents respectively. After execution of ... Read More

In 8085 Instruction set, STA is a mnemonic that stands for STore Accumulator contents in memory. In this instruction, Accumulator8-bit content will be stored to a memory location whose 16-bit address is indicated in the instruction as a16. This instruction uses absolute addressing for specifying the destination. This instruction occupies 3-Bytes of memory. First Byte is required for the opcode, and next successive 2-Bytes provide the 16-bit address divided into 8-bits each consecutively. Mnemonics, Operand Opcode(in HEX) Bytes STA Address 32 3 Let us consider STA 4050H as an example instruction of this type. ... Read More

In 8085 Instruction set, LDA is a mnemonic that stands for LoaD Accumulator with the contents from memory. In this instructionAccumulatorwill get initialized with 8-bit content from the 16-bit memory address as indicated in the instruction as a16. This instruction uses absolute addressing for specifying the data. It occupies 3-Bytes in the memory. First Byte specifies the opcode, and the successive 2-Bytes provide the 16-bit address, i.e. 1-Byte each for each memory location. Mnemonics, Operand Opcode(in HEX) Bytes LDA Address 3A 3 Let us consider LDA 4050H as an example instruction of this type. ... Read More

In 8085 Instruction set, this instruction MVI M, d8 is used to load a memory location pointed by HL pair with an 8-bit value directly. This instruction uses immediate addressing for specifying the data. It occupies 2-Bytes in memory. Mnemonics, Operand Opcode(in HEX) Bytes MVI M, Data 36 2 As an example, we can consider MVI M, ABH as an example instruction of this type. It is a 2-Byte instruction, with opcode for MVI M using up one Byte, and ABH using up another more Byte. We are considering that HL register pair is ... Read More

In the 8085 Instruction set there are four instructions, which belong to the type LXI rp, d16. These instructions are used to load the 16-bit address into the register pair. We can use this instruction to load data from memory location using the memory address, which is stored in the register pair rp. For an example, if the instruction is LXI H, FE50. It means that the FE50 is loaded into the HL register pair. The rp can be BC, DE, HL or SP. The LXI instructions and their Hex-codes are as follows. Mnemonics, Operand Opcode (in HEX) ... Read More

In 8085 Instruction set, MOV is a mnemonic, which stands for “MOVe”. In this instruction 8-bit data value in register r2 will be moved to the 8-bit register r1. Note that in 8085 instructions, as the first operand specifies the destination, and the second one the source, so here also r1 is destination register and r2 is the source register. This instruction uses register addressing for specifying the data. Here, “r1” and “r2”can be any one of the following registers. r1, r2 = A, B, C, D, E, H, or L As r1 can have any one of ... Read More

MVI is a mnemonic, which actually means “Move Immediate”. With this instruction, we can load a register with an 8-bitsor 1-Bytevalue. This instruction supports immediate addressing mode for specifying the data in the instruction. In the instruction “d8” stands for any 8-bit data, and ‘r’ stands for any one of the registers e.g. A, B, C, D, E, H or L. So this r can replace any one of the seven registers. As ‘r’ can have any of the seven register names, so there are seven opcodes for this type of instruction. It occupies 2-Bytes in the memory. ... Read More