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Computer Science Articles
Page 28 of 53
What is Asynchronous Data Transfer in Computer Architecture?
In this transmission, signals are sent between the computers and external systems or vice versa asynchronously. This generally defines data that is sent at infrequent intervals instead of in a steady stream, which represents that the first element of the execute file might not ever be the first to be transmitted and enter at the destination.There are different elements of the execute data that are sent in multiple intervals, frequently together, but follow several paths approaching the destination. The transfer of asynchronous data doesn’t need the coordination or timing of bits between the two endpoints.The internal operations in a digital ...
Read MoreWhat is the difference between Isolated and memory-mapped I/O?
Isolated I/OIn the isolated I/O configurations, the CPU has definite input and output instructions, and each of these instructions is related to the address of an interface register. When the CPU fetches and decodes the operation code of an input or output instruction, it locates the address related to the instruction into the common address lines.Simultaneously, it enables the I/O read (for input) or I/O write (for output) control line. This instructs the external elements that are connected to the common bus that the address in the address lines is for an interface register and not for a memory word.In ...
Read MoreWhat are the uses of multibyte data organization in computer architecture?
There are two commonly used for organizations for multibyte data such as big-endian and little-endian. In the big-endian format, the most important byte of a value is saved in location X, the following byte in location X + 1, and so on. For example, the hexadecimal value 0102 0304H (H for hexadecimal) would be stored, starting in location 100H, as shown in table (a).Data organization in (a) big endian and (b) little endian formatsMemory AddressData (in hex)10101102021030310404(a)Memory AddressData (in hex)10104102031030210401(b)In little endian, the order is reversed. The smallest significant byte is saved in location X, the next byte in location ...
Read MoreWhat is the configuration of memory subsystem in computer architecture?
There is the following technique for joining memory chips to form a memory subsystem. Two or more chips can be combined to generate a memory with more bits per location. This is done by linking the corresponding address and control signals of the chips and linking their data pins to various bits of the data bus.For example, two 8 x 2 chips can be combined to generate an 8 x 4 memory as displayed in the figure. Both chips get the equal three address inputs from the bus, and the same chip enables and output enables signals.The data chips of ...
Read MoreWhat is internal chip organization in computer architecture?
The internal organization is linear. This chip has three address inputs and two data outputs, and 16 bits of internal storage constructed as eight 2-bit locations. The three address bits are decoded to choose one of the eight locations, but only if the chip enable is active. If CE = 0, the decoder is disabled and no location is selected.The tri-state buffers for that location’s cells are enabled, authorizing data to move to the output buffers. If both CE and OE are set to 1, these buffers are enabled and the data is output from the chip, therefore, the outputs ...
Read MoreWhat are Instruction Cycles in computer architecture?
The instruction cycle is the process a microprocessor goes through to process an instruction. First, the microprocessor fetches or reads, the instruction from the memory. Therefore it decodes the instruction, determining which instruction it has fetched. Finally, it implements the operations required to execute the instruction. Each of these functions including fetch, decode and execute contains a sequence of one or more operations.First, the microprocessor locates the address of the instruction on the address bus. The memory subsystem inputs this address and decodes it to access the desired memory locations. After the microprocessor enables ample time for memory to decode ...
Read MoreWhat is System Buses?
A bus is a set of wires. The elements of the computer are linked to the buses. It can transfer data from one element to another, the source element outputs data onto the bus. The destination element then inputs this information from the bus. As the complexity of a computer system improves, it becomes more effective (in methods of minimizing connections) at using buses instead of a direct connection between each pair of devices.Buses use less area on a circuit board and need less power than a huge number of direct connections. It can also need fewer pins on the ...
Read MoreWhat is Magnetic Tape?
Magnetic tape transport includes the robotic, mechanical, and electronic components to support the methods and control structure for a magnetic tape unit. The tape is a layer of plastic coated with a magnetic documentation medium.Magnetic tapes are used in most organizations to save data files. Magnetic tapes use a read-write mechanism. The read-write mechanism defines writing data on or reading data from a magnetic tape. The tapes sequentially save the data manner. In this sequential processing, the device should start searching at the starting and check each record until the desired information is available.Magnetic tape is the low-cost average for ...
Read MoreWhat are Magnetic Disks?
A magnetic disk is a storage device that can be assumed as the shape of a Gramophone record. This disk is coated on both sides with a thin film of Magnetic material. This magnetic material has the property that it can store either ‘1’ or ‘0] permanently. The magnetic material has square loop hysteresis (curve) which can remain in one out of two possible directions which correspond to binary ‘1’ or ‘0’. Bits are saved in the magnetized surface in marks along concentric circles known as tracks. The tracks are frequently divided into areas known as sectors.In this system, the ...
Read MoreWhat are the basic components of the memory management unit in computer architecture?
In a multiprogramming system, the main memory is broken into two parts as one part for the operating system (resident monitor) ad one part for the program currently being implemented. In a multiprogramming system, the “user” part of memory is divided to contain various processes. The task of the subdivision is carried out dynamically by the operating framework and is called memory management.Address spaces − The Pentium-II contains hardware for both segmentation and paging. Both mechanisms can be disabled, enabling the user to select from the definite aspect of memory −Unsegmented unpaged memory − In this case, the virtual address ...
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