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Arithmetic group in 8051
In 8051 Microcontroller there are 24 different instructions under the Arithmetic Group. In total there are 64 opcodes. The Carry Flag (CY), Auxiliary Carry (AC)and Overflow flag (OV) are affected based on the result of ADD, ADDC, SUBB etc. instructions. The multiple and divide instructions clear the Carry flag, and also does not affect the AC flag. After execution of multiplication, the OV flag will be 1 when the result is greater than FFH. Otherwise, it is 0. Similarly, after division OV flag is 1 when the content of B is 00H before division, otherwise it is 0. The DA A (Decimal Adjust Accumulator) affects the Carry Flag only.
In the following table, we will see the Mnemonics, Lengths, Execution Time in terms of the machine cycle, Number of Opcodes etc.
| Mnemonics | Byte Count | execution time | OpcodeCount |
|---|---|---|---|
| ADD A, Rn | 1 | 1 | 8 |
| ADD A, a8 | 2 | 1 | 1 |
| ADD A, @Ri | 1 | 1 | 2 |
| ADD A, #d8 | 2 | 1 | 1 |
| ADDC A, Rn | 1 | 1 | 8 |
| ADDC A, a8 | 2 | 1 | 1 |
| ADDC A, @Ri | 1 | 1 | 2 |
| ADDC A, #d8 | 2 | 1 | 1 |
| SUBB A, Rn | 1 | 1 | 8 |
| SUBB A, a8 | 2 | 1 | 1 |
| SUBB A, @Ri | 1 | 1 | 2 |
| SUBB A, #d8 | 2 | 1 | 1 |
| INC A | 1 | 1 | 1 |
| INC Rn | 1 | 1 | 8 |
| INC a8 | 2 | 1 | 1 |
| INC @Ri | 1 | 1 | 2 |
| DEC A | 1 | 1 | 1 |
| DEC Rn | 1 | 1 | 8 |
| DEC a8 | 2 | 1 | 1 |
| DEC @Ri | 1 | 1 | 2 |
| INC DPTR | 1 | 2 | 1 |
| MUL AB | 1 | 4 | 1 |
| DIV AB | 1 | 4 | 1 |
| DA A | 1 | 1 | 1 |
Examples
| Sr.No | Instruction & Description |
|---|---|
| 1 | ADD A, 32H This is an instruction of type ADD A, #d8. The immediate data 32H is added to register A. The result is also stored in A. |
| 2 | ADDC A, @R1 This is an instruction of type ADDC A, @Ri. It means the content on internal RAM location which is pointed by register R1 is added to A. |
| 3 | SUBB A, R5 This is SUBB A, Rn type instruction. The SUBBstands for Subtract with borrow. So the content of R5 will be subtracted from A. |
| 4 | INC 40H This is a type of INC a8. Here the content in local RAM whose address is 40H, it is increased by 1. |
| 5 | INC DPTR It can increase the content of DPTR by 1. This instruction takes two machine cycle to execute. |
| 6 | MUL AB This instruction is used to multiply the content of register A and B. The 16-bit address will be stored at B and A registers. The B will hold the MS byte, and A will hold the LSByte. |
| 7 | DIV AB This instruction is used to divide the content of A register by B register. The 8-bit quotient is stored into the register A, and the 8-bit remainder is stored into the register B. |
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