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Call if parity odd (CPO) in 8085 Microprocessor
In 8085 Instruction set, CPO is a mnemonic, which stands for “Call if Parity Odd”. This instruction is a used to branch to the subroutine whose 16-bit address is provided in the instructions, only if P flag value is 0. If Z flag value is 1, program flow continues in the main program sequentially. It is a 3-Byte instruction.
Mnemonics, Operand | Opcode(in HEX) | Bytes |
---|---|---|
CPO Label | E4 | 3 |
Let us consider the following sample code for a better explanation –
Address | Hex Codes | Mnemonic | Comment |
---|---|---|---|
2000 | 31 | LXI SP, 5000H | SP ← 5000H.Initializing the SP |
2001 | 00 | Low order Byte of the address | |
2002 | 50 | High order Byte of the address | |
2003 | 3E | MVI A, 40H | A ← 40H, Initializing the Accumulator with initial value 40H |
2004 | 40 | 40H as operand | |
2005 | 06 | MVI B, 30H | B ← 30H, Initializing the Register B with initial value 30H |
2006 | 30 | 30H as operand | |
2007 | 90 | SUB B | A ← A – B= 40H – 30H = 10H, As 10H = 0001 0000B is the computed result,so P = 0 |
2008 | E4 | CPO 2010H | Calling the subroutine at address 2010H as P = 0. So now the control of the program will be transferred to the location 2010H. And the return address 200BH i.e. address of the next instruction will be pushed on the top of the stack. As a result 4FFFH (SP – 1) will contain 20H and 4FFEH (SP – 2) will contain 0BH respectively. |
2009 | 10 | Low order Byte of the address | |
200A | 20 | High order Byte of the address | |
200B | 21 | LXI H, 4050H | HL ← 4050H, Initializing the HL register pair. After execution of the RET instruction, control will come back to this instruction. |
200C | 50 | Low order Byte of the address | |
200D | 40 | High order Byte of the address | |
200E | 77 | MOV M, A | M ← A, Content of the Accumulator will be transferred to the memory location 4050H as it is pointed by HL register pair. So at 4050Hmemory location Accumulators content, 40H will be stored. |
200F | 76 | HLT | End of the program. |
2010 | 80 | ADD B | A ← A + B ← 10H + 30H = 40H |
2011 | C9 | RET | Return the control to the address 200BH. Return address 200BH will be popped out from the top of the stack. So from address 4FFEH, 0BH will be popped and from address, 4FFFH 20Hwill be popped and SP will get the initial address 5000H back as its content accordingly. |
The timing diagram against this instruction CPO 2010H execution is as follows –
Summary − So this instruction CPO requires 3-Bytes, 5-Machine Cycles (Opcode Fetch, Memory Read, MemoryRead, Memory Write, Memory Write) and 18 T-States for execution as shown in the timing diagram.
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