Hardware Synchronization

Hardware Synchronization provides solutions to the critical-section problem using atomic hardware instructions. These hardware-based techniques form the foundation for more sophisticated synchronization mechanisms and offer better performance than pure software solutions.

Hardware synchronization relies on the premise of locking using atomic operations that cannot be interrupted. These instructions allow us to test and modify memory locations or swap values as one uninterruptible unit, making them ideal for implementing mutual exclusion in multiprocessor environments.

Why Hardware Support is Needed

In uniprocessor systems, disabling interrupts can solve the critical-section problem by preventing preemption. However, this approach fails in multiprocessor environments because:

• Disabling interrupts on all processors is time-consuming

• Message passing to coordinate interrupt disabling creates delays

• System clock updates depend on interrupts and would be affected

• Overall system efficiency decreases significantly

Atomic Hardware Instructions

Test-and-Set Instruction

The TestAndSet() instruction atomically tests and modifies a boolean variable:

boolean test_and_set(boolean *target) {
    boolean rv = *target;
    *target = true;
    return rv;
}

Implementation with Test-and-Set:

do {
    while (test_and_set(&lock)) 
        ; /* busy wait */
    /* critical section */
    lock = false;
    /* remainder section */
} while (true);

Compare-and-Swap Instruction

The compare_and_swap() instruction atomically compares a value and swaps it if equal to expected:

int compare_and_swap(int *val, int expected, int new_val) {
    int temp = *val;
    if (*val == expected)
        *val = new_val;
    return temp;
}

Implementation with Compare-and-Swap:

do {
    while (compare_and_swap(&lock, 0, 1) != 0)
        ; /* busy wait */
    /* critical section */
    lock = 0;
    /* remainder section */
} while (true);

Bounded-Waiting Solution

The basic atomic instructions satisfy mutual exclusion but not bounded waiting. Here's an enhanced algorithm using TestAndSet() that ensures bounded waiting:

do {
    waiting[i] = true;
    key = true;
    while (waiting[i] && key)
        key = test_and_set(&lock);
    waiting[i] = false;
    
    /* critical section */
    
    j = (i + 1) % n;
    while ((j != i) && !waiting[j])
        j = (j + 1) % n;
    
    if (j == i)
        lock = false;
    else
        waiting[j] = false;
        
    /* remainder section */
} while (true);

This algorithm uses:

• boolean waiting[n] − Array tracking which processes are waiting

• boolean lock − Global lock variable

Critical Section Requirements Analysis

How Bounded Waiting Works

When a process exits its critical section, it scans the waiting array in cyclic order (i+1, i+2, ..., n-1, 0, ..., i-1). The first waiting process in this order becomes the next to enter the critical section. This ensures any waiting process will enter within n-1 turns, satisfying the bounded-waiting requirement.

Conclusion

Hardware synchronization using atomic instructions like Test-and-Set and Compare-and-Swap provides efficient solutions for the critical-section problem in multiprocessor systems. While basic implementations may not guarantee bounded waiting, enhanced algorithms can satisfy all three critical-section requirements, forming the foundation for higher-level synchronization primitives.