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Jump if positive (JP) in 8085 Microprocessor
In 8085 Instruction set, we are having one mnemonic JP a16, which stands for “Jump if Positive” and “a16” stands for any 16-bit address. This instruction is used to jump to the address a16 as provided in the instruction. But as it is a conditional jump so it will happen if and only if the present sign flag value is 0. If the sign flag value is 1, program flow continues sequentially. It is a3-Byte instruction.
| Mnemonics, Operand | Opcode(in HEX) | Bytes |
|---|---|---|
| JPLabel | F2 | 3 |
Let us consider one example of this instruction type JP 4000H. It is a 3-Byte instruction. The result of execution of this instruction is shown below with an example.
| Address | Hex Codes | Mnemonic | Comment |
|---|---|---|---|
| 2000 | 3E | MVI A,40 | A ← 40H |
| 2001 | 40 | 8-bit operand 40H | |
| 2002 | 06 | MVI B,30 | B ← 30H |
| 2003 | 30 | 8-bit operand 30H | |
| 2004 | 90 | SUB B | A ← A – B= 40H – 30H = 10H. As the result is 10H and as the result is positive, so S flag bit will be 0 |
| 2005 | F2 | JP 4000 | Jump Positive, i.e. Jump when S = 0, as the subtraction result is 10H, so S flag bit will remain with value 0 |
| 2006 | 00 | Low order Byte of the target address | |
| 2007 | 40 | High order Byte of the target address PC <- 4000H, So the program control will be transferred to the address 4000H | |
| 2008 | 78 | MOV A, B | This instruction will not get control now as JP will transfer the control to the memory address 4000H |
| …. | …. | …. | …. |
| 4000 | 41 | MOV B, C | Next instruction at address 4000H will get the control |
The timing diagram against this instruction JP 4000H execution is as follows –
Summary − So this instruction JP requires 3-Bytes, 3-Machine Cycles (Opcode Fetch, Memory Read, MemoryRead) and 10 T-States for execution as shown in the timing diagram.
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