Signed Magnitude Representation

1s & 2s Complement Representation Of Signed Numbers

2'S Complement Representation Example

2'S Complement Representation Previous GATE Problem 1

2'S Complement Representation Previous GATE Problem 2

2'S Complement Representation Previous GATE Problem 3

2'S Complement Representation Previous GATE Problem 4

2'S Complement Representation Previous GATE Problem 5

Binary Arithmetic Addition

Binary Arithmetic Subtraction

Binary Arithmetic Multiplication

Binary Arithmetic Multiplication Example

Binary Arithmetic Division

Introduction To Complement Subtraction

1’S Complement Subtraction Smaller To Larger

1’S Complement Subtraction Smaller From Larger Example

1’S Complement Subtraction Larger To Smaller

1’S Complement Subtraction Larger From Smaller Example

2’S Complement Subtraction Smaller From Larger

2’S Complement Subtraction Smaller From Larger Example

2’S Complement Subtraction Larger From Smaller

2’S Complement Subtraction Previous GATE Problem

Introduction To 15'S And 16'S Complement

Hexadecimal Addition

Hexadecimal Subtraction

15’S Complement Subtraction Smaller From Larger

15’S Complement Subtraction Smaller From Larger Examples

15’S Complement Subtraction Larger From Smaller

16’S Complement Subtraction Smaller From Larger

16’S Complement Subtraction Larger From Smaller

15’S Complement And 16s Complement Subtraction Examples

Classification Of Binary Codes

BCD Code (Binary Coded Decimal)

BCD Addition

9s Complement And 10s Complement

BCD Subtraction Using 9’S Complement

BCD Subtraction Using 9’S Complement Example

BCD Subtraction Using 10'S Complement

BCD Subtraction Using 10'S Complement Example

Excess-3 Code

Excess 3 Addition

Excess-3 Addition Example

Excess 3 Code Subtraction Using 9s Complement

Excess-3 Subtraction Using 9’S Complement Example

Excess-3 Subtraction Using 10’S Complement

Excess-3 Subtraction Using 10’S Complement Example

Gray Code & Conversion Binary To Gray

Gray To Binary Conversion

ASCII Code

Introduction To Logic Gates & Boolean Algebra

Introduction To Logic Gates

AND Gate

OR Gate

NOT Gate

NAND Gate

NOR Gate

EX-OR Gate

EX NOR Gate

Alternate Gate

Properties Of EX-OR Gate

NAND Realization

NOR Realization

X-OR Gate Example

Logic Gates Example

Implement AND & NAND Gates

Back Propagation Problem Example

NAND Realization Example

Fundamentals of Boolean Algebra

Theorem's of Boolean Algebra

Stuck-At-1 Fault In Logic Circuit

Dual Of Boolean Expression

Properties Of Boolean Algebra

Boolean Equation Representation - Literal

Boolean Expression Representation In Sum Of Products Form

Boolean Expression Representation In Product Of Sum Form

Boolean Expression Representation Using Canonical Form

Min-Terms And Max-Terms In Boolean Algebra

Converting SOP To SSOP

Converting POS To SPOS

Converting SSOP To SPOS

Logic Gates - GATE Problem Example

Distributive Property - GATE Problem Example

Propagation Delay & Example

Propagation Delay - GATE Problem Example

Transposition Property - GATE Problem Example

Logic Gates Using BASIC Propagation Method - GATE Problem Example

Karnaugh Map (K-Map)

Rules For K-Map Simplification Part 1

Rules For K-Map Simplification Part 2

K-Maps GATE Problem Example 1

K-Maps GATE Problem Example 2

Boolean Expression Solving Using K-Map

Don’t Care & Problem

Boolean Expression Using K-Map GATE Problem Example

POS Expression Using K-Map GATE Problem Example

K-Map & Logic Circuit Design GATE Problem Example

Expression Solving Using Boolean Law

Introduction To Combinational Circuits

Designing Steps For A Combinational Circuit

Combinational Circuit Design GATE Problem Example

Design Of Half Adder

Designing Of Full Adder

Half Subtractor

Full Subtractor

N-Bit Parallel Adder 4 Bit Parallel Adder

4-Bit Parallel Adder Cum Subtractor

Designing Of Full Adder Using Half Adder

Carry Generation In Carry Look Ahead Adder

Carry Look Ahead Adder

BCD Adder

Excess-3 Adder

Comparators Part 1

Comparators Part 2

Binary To Gray Code Converter

Code Converter Binary To BCD

Parity Bit & Check Bit

Odd Parity Generator

Even Parity Generator

2 To 4 Decoder Design

3 To 8 Decoder Design

Multiplexer (MUX) 2 X 1MUX Design

MUX Problem Part-1

MUX Problem Part-2

4X1 MUX

MUX GATE Problem Example Part 1

MUX GATE Problem Example Part 2

MUX GATE Problem Example Part 3

Introduction Of Hamming Code

Hamming Code Generation With An Example

Hamming Code Generation Example With Even Parity

Hamming Code Generation Example With Odd Parity

Error Correction In Hamming Code

Error Detection & Correction In Hamming Code

Introduction To Sequential Circuits

S-R Latch Using NOR Gates

S-R Latch With NAND Gates

S-R Flip Flop

Equation For S-R Flip Flop

D Flip Flop

J-K Flip Flop

T Flip Flop

Equation For J-K Flip Flop

Race Around Condition In J-K Flip Flop

Excitation Table For S-R Flip Flop

Excitation Table For D Flip Flop

Excitation Table For J-K Flip Flop

Excitation Table For T Flip Flop

Flip-Flop Conversion Process Steps

S-R To D Flip Flop Conversion

S-R To J-K Flip Flop Conversion

S-R To T Flip Flop Conversion

J-K To T Flip Flop Conversion

J-K To D Flip Flop Conversion

T To D Flip Flop Conversion

D To T Flip-Flop Conversion

Propagation Delay

Flip-Flop Conversion GATE Problem Example

Race Around Condition GATE Problem Example

Applications of Flip-Flop

Universal Shift Register

Serial In Parallel Out Shift Register

Serial In Serial Out Shift Register

Shift Register Problem Example 1

Shift Register Problem Example 2

Introduction of Counter

Introduction of Asynchronous Counter

Ripple Up Counter

Ripple Down Counter

Synchronous Counter

Ring Counter Or Shift Register Counter

Twisted Ring Counter or Johnson’s Counter

Johnson’s Counter GATE Problem Example

Ripple Counter Problem Example

Synchronous Counters GATE Problem Example

Modulus Of Counter

Counters Problem Example 1

Counters Problem Example 2

Asynchronous & Direct Inputs

MOD 3 Asynchronous Counter

MOD 12 Counter

MOD Counter Example

Introduction To Logic Families

Characteristics of Logic Families

Resistor Transistor Logic (RTL)

Direct Coupled Transistor Logic

Diode Transistor Logic NAND Gate

Diode Transistor Logic NOR Gate

Transistor Transistor Logic

Versions In Transistor Transistor Logic

PMOS & NMOS Inverter

CMOS Inverter

PMOS NAND Gate

PMOS NOR Gate

Designing Of Universal Gates Using NMOS

CMOS NAND Gate

CMOS NOR Gate

Comparision Of Logic Families

Semi Conductor Memories

ROM (Non Volatile)

RAM (Volatile)

Difference Between SRAM & DRAM

Introduction To Data Converters

Binary Weighted Resistor DAC

R-2R Ladder DAC (Voltage Switched)

R-2R Ladder DAC (Current Switched)

Counter Type ADC

Successive Approximation Type ADC

Flash Parallel Type ADC

Dual Slope Or Integrating Type ADC

Sigma Delta ADC

ADC Problem Example

Resolution Of DAC

ADC GATE Model Example 1

ADC GATE Model Example 2

Flash ADC GATE Model Example

Resolution Of DAC GATE Model Example